A novel cascaded thin-film thermoelectric cooler for on-chip hotspot cooling

•A novel design of a cascaded planar thin-film thermoelectric cooler is proposed.•The influence of key parameters on cooling performance is discussed.•The effect of contact resistance can be limited to 4 % by large-area contact.•The optimized minimum cooling temperature can be as low as −44.6 °C.•A maximum cooling temperature difference of 69.6 °C can be achieved. Thin-film thermoelectric coolers (TFTECs) are a potential solution for on-chip thermal management of power devices. However, substrate heat leakage, large TE leg resistance, and low integration level can degrade the performance of in-plane TFTECs, making it difficult to achieve large cooling temperature differences. Serious challenges still remain in the structural engineering of in-plane TFTECs, which need to be improved to fully exert the cooling performance. In this work, a novel cascaded in-plane TFTEC based on a flexible polyimide substrate is proposed to achieve high-efficiency on-chip hotspot cooling. The device is designed with a radial structure to increase the heat absorption area ratio. Two cascade rings are used to divide the device into three stages to enhance the heat flow in the planar direction and to further increase the number of legs and the cold end area. The effects of substrate thickness, cascade material, electrode height and leg height on the cooling performance are analyzed using the finite element method. When the substrate thickness is 25 μm, the electrode height is 5 μm, and the leg height is 5 μm, the cascaded in-plane TFTEC can achieve a minimum cooling temperature of −44.6 °C and a maximum cooling temperature difference of 69.6 °C at a current of 25 mA. The effect of contact resistance is limited to 4 % since the planar configuration can provide large-area contact.