DC-10 GHz broadband linear power amplifier for 5G applications using 180 nm CMOS technology

This article suggests a broadband linear power amplifier (PA) for DC-10 GHz for Fifth-generation (5G) and multi-standard applications using 180 nm CMOS technology. The suggested radio frequency power amplifier is appropriate for wideband LTE, IoT, WSN, multi-standard, and 5G radio frequency transmitters. T-coil peaking and bridged-shunt-series peaking amplifiers are used for bandwidth extension and gain flatness. Also, the interstage matching inductors between common source and common gate transistors are applied to improve radio frequency achievement. The suggested PA consists of four stages as follows; input stage, two stages using the T-coil peaking technique, and the last stage utilizing bridged-shunt-series peaking topology. The input stage is a complementary current reuse (CCR) common gate with active shunt feedback (SFB) architecture. It is utilized to extend the matching of RF input impedance with agreeable linearity and power gain at little power consumption. The second stage works in class-C operation to enhance the efficiency and reduce DC power consumed whereas the class-AB mode is utilized in the third and fourth stages to improve the output power. The suggested PA obtains a peak constant power equal to 14.25 dBm, a maximum Power-Added-Efficiency (PAE) of 16 %, and a peak gain equal to 22 dB. The proposed power amplifier dissipates a DC power of 80 mW. The die size of the proposed power amplifier equals 1mm2, whereas the total chip size includes the pads is 1.62mm2.