A low-power CT 2nd order Delta Sigma modulator using a new design methodology for biomedical applications

This paper presents a low-power second-order continuous-time (CT) Delta-Sigma Modulator (DSM) using a new design methodology for biomedical applications. The proposed design methodology first implements a target block with the highest power consumption at a transistor level before optimizing the DSM coefficients. We are also able to reduce the area usage by appropriate limitations on the DSM range in the proposed design process. The DSM was implemented using the genetic algorithm (GA) and appropriate chopping techniques in our design process. The design was implemented in 0.18um CMOS technology by using a 0.083 mm2 layout, with a maximum SNDR and dynamic range of 94.28 and 100 dB, respectively, for a 2 kHz bandwidth and 32.34uW power consumption.