Analysis of 3D NoC Router Chip on Different FPGA for Minimum Hardware and Fast Switching

The research letter emphasizes the hardware chip design of 3D router chip and its synthesis on different types of Xilinx series of field programmable gate arrays (FPGA). Network on chip is a concept for building multiprocessor systems that can switch communication through processing cores that were...

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Veröffentlicht in:National Academy science letters 2024-02, Vol.47 (1), p.35-39
Hauptverfasser: Agarwal, Prateek, Kumar Garg, Tanuj, Kumar, Adesh
Format: Artikel
Sprache:eng
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Zusammenfassung:The research letter emphasizes the hardware chip design of 3D router chip and its synthesis on different types of Xilinx series of field programmable gate arrays (FPGA). Network on chip is a concept for building multiprocessor systems that can switch communication through processing cores that were inspired by computer networks. The design assessment is based on the pre-synthesis device utilization summary for various FPGA boards, including Spartan-3E (XC3S500E), Spartan-6 (XC6SLX45), Virtex-4 (XC4VFX12), Virtex-5 (XC5VSX50T), and Virtex-7 (XC7VX550T). The performance analysis for hardware and delay help the researchers to pre-estimate optimal hardware and switching parameters before the manufacturing of the chip.
ISSN:0250-541X
2250-1754
DOI:10.1007/s40009-023-01295-y