Optimizing the Combined Automation Scheme in the ASIS Basis

A method is proposed for decreasing the area of the ASIS occupied by the scheme of a combined automation. The method is based on the encoding of the classes of pseudoequivalent states of Moore automation by additional variables. This approach leads to a four-level scheme implemented as two nano-PLAs and decreases the area of a nano-PLA that generates microoperations of the Moore automation and additional variables. An example of synthesis with the use of the proposed scheme is considered. The results of the efficiency analysis of the proposed method with the use of the library of benchmarks are presented.