System- and circuit-level optimization of PLL designs for DVB-T/H receivers

This article proposes a framework for the optimization of voltage-controlled oscillator (VCO) designs in frequency synthesizers for digital video broadcasting – terrestrial/handheld (DVB-T/H) receivers. Linear time-invariant phase-domain model of a charge-pump phase-locked loop (PLL) is devised and includes both flicker (1/ f ) and thermal noise contributions from the loop oscillators. By modeling the entire receiver, it is shown that there are combinations of flicker and thermal noise contributions that result in a constant sum of inter-carrier interference (ICI) and adjacent channel interference, and constant symbol error rate as well. Consequently, optimization of the VCO phase noise spectrum is defined while maintaining the standard-specified symbol-error rate. Link-level performance evaluation is carried out to validate the stipulated trade-off. The effect of ICI mitigation schemes is discussed. Circuit-level VCO design approaches utilizing the derived trade-off are finally presented. The proposed optimization procedure is generic and is also applicable to other systems based on Orthogonal Frequency-Division Multiplexing.