Development of AlGaN/GaN HEMTs with efficiencies above 60% up to 100 V for next generation mobile communication 100 W power bars
We present a systematic study of epitaxial growth, processing technology, device performance and reliability of our GaN HEMTs manufactured on 3‐inch SiC substrates. Epitaxy and processing are optimized for both performance and reliability. The deposition of the AlGaN/GaN HEMT epitaxial structures is...
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Veröffentlicht in: | Physica status solidi. C 2009-06, Vol.6 (6), p.1369-1372 |
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Sprache: | eng |
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Zusammenfassung: | We present a systematic study of epitaxial growth, processing technology, device performance and reliability of our GaN HEMTs manufactured on 3‐inch SiC substrates. Epitaxy and processing are optimized for both performance and reliability. The deposition of the AlGaN/GaN HEMT epitaxial structures is designed for both low background carrier concentration and a low trap density in order to simultaneously achieve a high buffer isolation and low DC to RF dispersion. Device fabrication is performed using standard processing techniques involving both electron‐beam and stepper lithography. The developed HEMTs demonstrate excellent high‐voltage stability, high power performance and large power added efficiencies. Devices exhibit two‐terminal gate‐drain breakdown voltages in excess of 160 V (current criterion 1 mA/mm) across the entire 3‐inch wafer with parasitic gate and drain currents well below 1 mA/mm when biased up to 80 V drain bias under pinch‐off conditions. Load‐Pull measurements at 2 GHz on 800 μm gate periphery devices return both a well‐behaved relationship between bias‐voltage and output‐power as well as power‐added‐efficiencies beyond 60% up to UDS = 100 V. For a drain bias of 100 V an output‐power‐density around 22 W/mm with 26 dB linear gain is obtained. On large periphery devices (32 mm gate width packaged in industry‐standard ceramic packages) an output power beyond 100 W is achieved with a PAE above 50% and a linear gain around 15 dB. Reliability is tested on devices having a gate periphery of 8×60 μm at an operating bias of 50 V under both DC and RF conditions. About 10% drain‐current change under DC‐stress (50 mA/mm) is observed after more than 1000 h of operation with an extrapolated drain‐current degradation below 20% after 200,000 h (more than 20 years) of operation. Under RF stress (2 GHz, 1 dB compression) the observed change in output power density is below 0.2 dB after more than 1000 h. (© 2009 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim) |
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ISSN: | 1862-6351 1610-1642 |
DOI: | 10.1002/pssc.200881502 |