Implementation of a low-cost phase-locked loop clock-recovery module for 40-Gb/s optical receivers

A low‐cost, compact, high‐performance clock‐recovery (CR) module using a new phase‐locked loop (PLL) for 40‐Gb/s optical receivers is successfully designed and implemented. The newly implemented frequency detector in the PLL helps to reduce the current consumption and also extended the frequency‐cap...

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Veröffentlicht in:	Microwave and optical technology letters 2006-02, Vol.48 (2), p.312-315
Hauptverfasser:	Woo, Dong Sik, Kim, Kang Wook, Lim, Sang-Kyu, Ko, Jesoo
Format:	Artikel
Sprache:	eng
Schlagworte:	40 Gb/s clock and data recovery (CDR) clock recovery (CR) jitter phase-locked loop (PLL)
Online-Zugang:	Volltext
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