A temporal compressive resource allocation technique for complexity reduction in PLC transceivers

This work introduces a novel resource allocation technique for dealing with linear and periodically time‐varying power line channels when an orthogonal frequency division multiplexing scheme is applied. By exploiting the correlations within one cycle of the mains signal, among cycles of mains signal and a combination of these connections, the proposed technique can offer three distinct trade‐offs between computational complexity reduction and data‐rate loss. Numerical results, which are based on measured data, are used to analyse these trade‐offs, when these inter‐cycle and intra‐cycle relationship are taken into account. Also, we verify that the use of the normalised signal‐to‐noise ratio incurs very low performance degradation, and because of computational complexity rationale, its use is strongly recommended. Additionally, we show that those cases, in which the correlations among the cycles of the mains signal is relevant, offer the best trade‐off between computational complexity reduction and data‐rate loss. Finally, we show that the proposed technique can achieve the optimal data‐rate and offers substantial improvements in terms of computational complexity when compared with existing approaches, including the Institute of Electrical and Electronics Engineers 1901 standard. Copyright © 2015 John Wiley & Sons, Ltd. A novel resource allocation technique for power line communication is addressed on this paper. It makes use of the high correlation between microslots, existing in the normalized signal to noise ratio, in order to decrease the resource allocation computational complexity. The proposed technique is divided in two blocks: (i) set partition block is responsible to grouping microslots with high correlation and (ii) bit‐loading block runs the bit‐loading algorithm once for each set.