A 0.7 V, 2.7 μW, 12.9 ppm/° C over 180° C CMOS subthreshold voltage reference

Summary An all‐CMOS, low‐power, wide‐temperature‐range, curvature‐compensated voltage reference is presented. The proposed topology achieves a measured temperature coefficient of 12.9 ppm/°C for a wide temperature range of 180°C ( − 60 to 120°C) at a bias voltage of 0.7 V while consuming a mere 2.7 μW. The high‐order curvature compensation, which leads to a low‐temperature sensitivity of the reference voltage, is performed using a new, simple, but efficient methodology. The non‐linearities of an N‐type metal‐oxide‐semiconductor (NMOS) device operated in subthreshold are combined with the non‐linearities of two different kinds of polysilicon resistors, leading to the improved performance. The extended temperature range of this voltage reference gives it an important competitive advantage, especially at lower temperatures, where prior art designs' performance deteriorate abruptly. In addition, it utilizes an innovative trimming methodology whereby two trimmable resistors enable the tuning of both the overall slope and non‐linearities of the temperature sensitivity. The design was fabricated using TowerJazz Semiconductor's CMOS 0.18 μm technology, without using diodes or any external components such as compensating capacitors. It has an area of 0.023 mm2 and is suitable for high‐performance power‐aware applications as well as applications operating in extreme temperatures. Copyright © 2016 John Wiley & Sons, Ltd. An all‐CMOS, low‐power, wide‐temperature‐range, curvature‐compensated voltage reference is presented. The proposed topology achieves a measured temperature coefficient of 12.9 ppm/°C for a wide temperature range of 180°C (‐60 to 120°C) at a bias voltage of 0.7 V while consuming a mere 2.7 μW. The high‐order curvature compensation is performed using a new and efficient methodology, where the non‐linearities of an N‐type metal‐oxide‐semiconductor device operated in subthreshold are combined with the non‐linearities of two different kinds of polysilicon resistors, leading to the improved performance. The design was fabricated using TowerJazz Semiconductor's CMOS 0.18 μm technology and occupies an area of 0.023 mm2 and is suitable for high‐performance power‐aware applications as well as applications operating in extreme temperatures.