Forming‐Free Grain Boundary Engineered Hafnium Oxide Resistive Random Access Memory Devices

A model device based on an epitaxial stack combination of titanium nitride (111) and monoclinic hafnia (111¯) is grown onto a c‐cut Al2O3‐substrate to target the role of grain boundaries in resistive switching. The texture transfer results in 120° in‐plane rotated m‐HfO2 grains, and thus, in a defined subset of allowed grain boundary orientations of high symmetry. These engineered grain boundaries thread the whole dielectric layer, thereby providing predefined breakdown paths for electroforming‐free resistive random access memory devices. Combining X‐ray diffraction and scanning transmission electron microscopy (STEM)–based localized automated crystal orientation mapping (ACOM), a nanoscale picture of crystal growth and grain boundary orientation is obtained. High‐resolution STEM reveals low‐energy grain boundaries with facing (1¯1¯2¯) and (1¯21) surfaces. The uniform distribution of forming voltages below 2 V—within the operation regime—and the stable switching voltages indicates reduced intra‐ and device‐to‐device variation in grain boundary engineered hafnium‐oxide‐based random access memory devices. The introduction of non‐volatile memory based on resistive switching in dielectric materials is impeded by device‐to‐device variations. Here, a novel way to pin the breakdown path leading to a forming‐free conductive filament to a well‐defined set of grain boundaries in HfO2 grown on top of TiN electrodes is presented. Grain‐boundary engineering may open the path to improved device functionality.