Recent Developments and Perspectives for Memristive Devices Based on Metal Oxide Nanowires

Memristive devices are considered one of the most promising candidates to overcome technological limitations for realizing next‐generation memories, logic applications, and neuromorphic systems in the modern nanoelectronics and information technology. Despite the continuous efforts, understanding the resistive switching mechanism underlying memristive/neuromorphic behavior still represents a challenge. Metal oxide nanowire‐based memristors appear suitable model systems for a deeper understanding of the involved physical/chemical phenomena due the possibility for localizing and investigating the switching mechanism. In practical aspects, nanowire‐based devices can be grown using a bottom‐up approach, thus being considered reliable candidates for going beyond the current scaling limitations of the top‐down approach by the standard lithography. In addition, taking into advantage of the high surface‐to‐volume ratio of these nanostructures, new device functionalities can be achieved by exploiting surface effects. In the literature, a variety of nanowire‐based devices such as single nanowires, nanowire arrays, and networks are reported to exhibit memristive behavior, explained by different switching mechanisms. This work provides a comparative review and a comprehensive analysis of device performances and physical phenomena responsible for memristive and neuromorphic behavior in such nanostructures. The analysis of the state‐of‐art of memristor devices based on nanowires and nanorods represent a milestone toward the development of nanowire‐based artificial neural networks. A review of memristors based on metal oxide nanowires. This work provides the state‐of‐art of nanowire‐based memristive and neuromorphic devices based on isolated nanowires, nanowire arrays, and networks. Besides analyses and comparison of device performances and functionalities, particular focus is given to the examination of the physical/chemical mechanisms underlaying resistive switching.