FPGA Digital Dice using Pseudo Random Number Generator
The goal of this project is to design a digital dice that displays dice numbers in real-time. The number is generated by a pseudo-random number generator (PRNG) using XORshift algorithm that is implemented in Verilog HDL on an FPGA. The digital dice is equipped with tilt sensor, display, power manag...
Gespeichert in:
Hauptverfasser: | , , , , , |
---|---|
Format: | Artikel |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | The goal of this project is to design a digital dice that displays dice
numbers in real-time. The number is generated by a pseudo-random number
generator (PRNG) using XORshift algorithm that is implemented in Verilog HDL on
an FPGA. The digital dice is equipped with tilt sensor, display, power
management circuit, and rechargeable battery hosted in a 3D printed dice
casing. By shaking the digital dice, the tilt sensor signal produces a seed for
the PRNG. This digital dice demonstrates a set of possible random numbers of 2,
4, 6, 8, 10, 12, 20, 100 that simulate the number of dice sides. The kit is
named SUTDicey. |
---|---|
DOI: | 10.48550/arxiv.2405.00308 |