Tejas Simulator : Validation against Hardware
In this report we show results that validate the Tejas architectural simulator against native hardware. We report mean error rates of 11.45% and 18.77% for the SPEC2006 and Splash2 benchmark suites respectively. These error rates are competitive and in most cases better than the numbers reported by...
Gespeichert in:
| Hauptverfasser: | , , , |
|---|---|
| Format: | Artikel |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | Sarangi, Smruti R Kalayappan, Rajshekar Kallurkar, Prathmesh Goel, Seep |
| description | In this report we show results that validate the Tejas architectural
simulator against native hardware. We report mean error rates of 11.45% and
18.77% for the SPEC2006 and Splash2 benchmark suites respectively. These error
rates are competitive and in most cases better than the numbers reported by
other contemporary simulators. |
| doi_str_mv | 10.48550/arxiv.1501.07420 |
| format | Article |
| fullrecord | <record><control><sourceid>arxiv_GOX</sourceid><recordid>TN_cdi_arxiv_primary_1501_07420</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>1501_07420</sourcerecordid><originalsourceid>FETCH-LOGICAL-a670-163299609d2d900223e89b15a2fc7a3bdc0c0d548b7c5650a30a435a8e7a873c3</originalsourceid><addsrcrecordid>eNotzkFPwjAchvFePBD0A3CiX2Dz33ZdW2-GCJiQeHDhurxrCykZYLqJ-O2N6Om5PfkxNhNUVlZrekS-pkspNImSTCVpwoomHjDw93T87DGeM3_iW_QpYEznE8ce6TSMfI0cvpDjPbvboR_iw3-nrFm-NIt1sXlbvS6eNwVqQ4WolXSuJhdkcERSqmhdJzTkzhuoLnjyFHRlO-N1rQmKUCkNGw2sUV5N2fxve_O2Hzkdkb_bX3d7c6sf09o7rA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>article</recordtype></control><display><type>article</type><title>Tejas Simulator : Validation against Hardware</title><source>arXiv.org</source><creator>Sarangi, Smruti R ; Kalayappan, Rajshekar ; Kallurkar, Prathmesh ; Goel, Seep</creator><creatorcontrib>Sarangi, Smruti R ; Kalayappan, Rajshekar ; Kallurkar, Prathmesh ; Goel, Seep</creatorcontrib><description>In this report we show results that validate the Tejas architectural
simulator against native hardware. We report mean error rates of 11.45% and
18.77% for the SPEC2006 and Splash2 benchmark suites respectively. These error
rates are competitive and in most cases better than the numbers reported by
other contemporary simulators.</description><identifier>DOI: 10.48550/arxiv.1501.07420</identifier><language>eng</language><subject>Computer Science - Hardware Architecture</subject><creationdate>2015-01</creationdate><rights>http://creativecommons.org/licenses/by-nc-sa/3.0</rights><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><link.rule.ids>228,230,780,885</link.rule.ids><linktorsrc>$$Uhttps://arxiv.org/abs/1501.07420$$EView_record_in_Cornell_University$$FView_record_in_$$GCornell_University$$Hfree_for_read</linktorsrc><backlink>$$Uhttps://doi.org/10.48550/arXiv.1501.07420$$DView paper in arXiv$$Hfree_for_read</backlink></links><search><creatorcontrib>Sarangi, Smruti R</creatorcontrib><creatorcontrib>Kalayappan, Rajshekar</creatorcontrib><creatorcontrib>Kallurkar, Prathmesh</creatorcontrib><creatorcontrib>Goel, Seep</creatorcontrib><title>Tejas Simulator : Validation against Hardware</title><description>In this report we show results that validate the Tejas architectural
simulator against native hardware. We report mean error rates of 11.45% and
18.77% for the SPEC2006 and Splash2 benchmark suites respectively. These error
rates are competitive and in most cases better than the numbers reported by
other contemporary simulators.</description><subject>Computer Science - Hardware Architecture</subject><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2015</creationdate><recordtype>article</recordtype><sourceid>GOX</sourceid><recordid>eNotzkFPwjAchvFePBD0A3CiX2Dz33ZdW2-GCJiQeHDhurxrCykZYLqJ-O2N6Om5PfkxNhNUVlZrekS-pkspNImSTCVpwoomHjDw93T87DGeM3_iW_QpYEznE8ce6TSMfI0cvpDjPbvboR_iw3-nrFm-NIt1sXlbvS6eNwVqQ4WolXSuJhdkcERSqmhdJzTkzhuoLnjyFHRlO-N1rQmKUCkNGw2sUV5N2fxve_O2Hzkdkb_bX3d7c6sf09o7rA</recordid><startdate>20150129</startdate><enddate>20150129</enddate><creator>Sarangi, Smruti R</creator><creator>Kalayappan, Rajshekar</creator><creator>Kallurkar, Prathmesh</creator><creator>Goel, Seep</creator><scope>AKY</scope><scope>GOX</scope></search><sort><creationdate>20150129</creationdate><title>Tejas Simulator : Validation against Hardware</title><author>Sarangi, Smruti R ; Kalayappan, Rajshekar ; Kallurkar, Prathmesh ; Goel, Seep</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-a670-163299609d2d900223e89b15a2fc7a3bdc0c0d548b7c5650a30a435a8e7a873c3</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2015</creationdate><topic>Computer Science - Hardware Architecture</topic><toplevel>online_resources</toplevel><creatorcontrib>Sarangi, Smruti R</creatorcontrib><creatorcontrib>Kalayappan, Rajshekar</creatorcontrib><creatorcontrib>Kallurkar, Prathmesh</creatorcontrib><creatorcontrib>Goel, Seep</creatorcontrib><collection>arXiv Computer Science</collection><collection>arXiv.org</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Sarangi, Smruti R</au><au>Kalayappan, Rajshekar</au><au>Kallurkar, Prathmesh</au><au>Goel, Seep</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Tejas Simulator : Validation against Hardware</atitle><date>2015-01-29</date><risdate>2015</risdate><abstract>In this report we show results that validate the Tejas architectural
simulator against native hardware. We report mean error rates of 11.45% and
18.77% for the SPEC2006 and Splash2 benchmark suites respectively. These error
rates are competitive and in most cases better than the numbers reported by
other contemporary simulators.</abstract><doi>10.48550/arxiv.1501.07420</doi><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | DOI: 10.48550/arxiv.1501.07420 |
| ispartof | |
| issn | |
| language | eng |
| recordid | cdi_arxiv_primary_1501_07420 |
| source | arXiv.org |
| subjects | Computer Science - Hardware Architecture |
| title | Tejas Simulator : Validation against Hardware |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-07T16%3A17%3A09IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-arxiv_GOX&rft_val_fmt=info:ofi/fmt:kev:mtx:journal&rft.genre=article&rft.atitle=Tejas%20Simulator%20:%20Validation%20against%20Hardware&rft.au=Sarangi,%20Smruti%20R&rft.date=2015-01-29&rft_id=info:doi/10.48550/arxiv.1501.07420&rft_dat=%3Carxiv_GOX%3E1501_07420%3C/arxiv_GOX%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |