The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration

The flexible processor an approach for single-chip hardware emulation by dynamic reconfiguration

A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for a single chip emulation system is developed. It demonstrates the sequential execution of several sub-circuits divided temporally from an original large circuit. In order to accelerate emulation speed, a logic elemen...

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Hauptverfasser: Ohkawa, Takeshi, Nozawa, Toshiyuki, Fujibayashi, Masanori, Miyamoto, Naoto, Leo, Karnan, Kita, Soichiro, Kotani, Koji, Ohmi, Tadahiro
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Hardware
Hardware > Very large scale integration design
Hardware > Very large scale integration design > Application-specific VLSI designs
Hardware > Very large scale integration design > Application-specific VLSI designs > Application specific processors
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Beschreibung
Zusammenfassung:A dynamically reconfigurable logic array, i.e., the Flexible Processor, suitable for a single chip emulation system is developed. It demonstrates the sequential execution of several sub-circuits divided temporally from an original large circuit. In order to accelerate emulation speed, a logic element, reducing total configuration data by 30% compared to conventional Look-Up-Table, and Temporal Communication Module (TCM) to support save/restore of circuit state and data communication among divided sub-circuits, are implemented on the Flexible Processor.
DOI:10.5555/1015090.1015237