Logic clause analysis for delay optimization

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Hauptverfasser:	Rohfleisch, Berhard, Wurth, Bernd, Antreich, Kurt
Format:	Tagungsbericht
Sprache:	eng
Schlagworte:	Hardware > Electronic design automation > Logic synthesis > Circuit optimization Hardware > Integrated circuits > Logic circuits > Combinational circuits
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creator	Rohfleisch, Berhard Wurth, Bernd Antreich, Kurt
description
doi_str_mv	10.1145/217474.217608
format	Conference Proceeding
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identifier	ISBN: 0897917251
ispartof	Proceedings of the 32nd annual ACM/IEEE Design Automation Conference, 1995, p.668-672
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source	IEEE Electronic Library (IEL) Conference Proceedings
subjects	Hardware -- Electronic design automation -- Logic synthesis -- Circuit optimization Hardware -- Integrated circuits -- Logic circuits -- Combinational circuits
title	Logic clause analysis for delay optimization
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