Minimum register requirements for a modulo schedule

Minimum register requirements for a modulo schedule

Modulo scheduling is an efficient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirements. We present a combined approach that schedules the loop operations for minimum register requirements, given a modulo...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Eichenberger, Alexandre E., Davidson, Edward S., Abraham, Santosh G.
Format: Tagungsbericht
Sprache:eng
Schlagworte:
Hardware > Electronic design automation > High-level and register-transfer level synthesis
Hardware > Electronic design automation > Methodologies for EDA
Hardware > Integrated circuits > Logic circuits > Arithmetic and datapath circuits
Hardware > Integrated circuits > Logic circuits > Design modules and hierarchy
Software and its engineering > Software notations and tools > Compilers
Software and its engineering > Software organization and properties > Contextual software domains > Operating systems > Communications management
Theory of computation > Design and analysis of algorithms > Approximation algorithms analysis > Scheduling algorithms
Theory of computation > Design and analysis of algorithms > Online algorithms > Online learning algorithms > Scheduling algorithms
Theory of computation > Theory and algorithms for application domains > Machine learning theory > Reinforcement learning > Sequential decision making
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Beschreibung
Zusammenfassung:Modulo scheduling is an efficient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirements. We present a combined approach that schedules the loop operations for minimum register requirements, given a modulo reservation table. Our method determines optimal register requirements for machines with finite resources and for general dependence graphs. This method demonstrates the potential of lifetime-sensitive modulo scheduling and is useful in evaluating the performance of lifetime-sensitive modulo scheduling heuristics.
DOI:10.1145/192724.192732