NASFLOW, a simulation tool for silicon technology development
A simulation system is described for linking two-dimensional simulators for process and device to a parameter extraction program, for the purpose of generating artificial parameters for the circuit analysis program, NASPICE. A key feature of the system is that it operates under the control of a shel...
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| creator | Forsythe, D. David Agarwal, Atul P. Yeh, Chune-Sin Aronowitz, Sheldon Gadepally, Bhaskar |
| description | A simulation system is described for linking two-dimensional simulators for process and device to a parameter extraction program, for the purpose of generating artificial parameters for the circuit analysis program, NASPICE. A key feature of the system is that it operates under the control of a shell program which offers a simple and easy to use interface to the user. Results of an initial development using the program sequence
SUPRA = > PISCES = > CADPET = > NASPICE are described. Good correlation was obtained between system generated drain characteristics and silicon for both N and P-channel MOS transistors, and similarly for CMOS DC transfer characteristics. |
| doi_str_mv | 10.1145/123186.123296 |
| format | Conference Proceeding |
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| fulltext | fulltext |
| identifier | ISBN: 9780897913638 |
| ispartof | Proceedings of the 27th ACM/IEEE Design Automation Conference, 1991, p.333-337 |
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| language | eng |
| recordid | cdi_acm_books_10_1145_123186_123296 |
| source | IEEE Electronic Library (IEL) Conference Proceedings |
| subjects | Applied computing -- Arts and humanities -- Architecture (buildings) -- Computer-aided design Applied computing -- Physical sciences and engineering -- Engineering -- Computer-aided design Hardware -- Hardware validation -- Functional verification -- Simulation and emulation Hardware -- Integrated circuits |
| title | NASFLOW, a simulation tool for silicon technology development |
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