Hardware design verification simulation and formal method-based approaches

The Practical, Start-to-Finish Guide to Modern Digital Design Verification As digital logic designs grow larger and more complex, functional verification has become the number one bottleneck in the design process. Reducing verification time is crucial to project success, yet many practicing engineer...

Ausführliche Beschreibung

Bibliographische Detailangaben

1. Verfasser:	Lam, William K. C. 1962- (VerfasserIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Upper Saddle River, NJ Prentice Hall Professional Technical Reference 2005
Schriftenreihe:	Prentice Hall modern semiconductor design series
Schlagworte:	Integrated circuits > Verification Circuits intégrés ; Vérification Integrated circuits ; Verification
Online-Zugang:	lizenzpflichtig
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!