SRAM design - overview and memory cell division
Course content reaffirmed: 06/2015--This tutorial walks you through the initial steps in designing an SRAM and then focuses on the first circuit that we must design - the memory cell. An overview of the architecture will be presented in a block diagram that will describe the functions of the major b...
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| Format: | Elektronisch Video |
| Sprache: | English |
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IEEE
2009
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| Online-Zugang: | DE-92 DE-91 |
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| 500 | |a Description based on online resource; title from title screen (IEEE Xplore Digital Library, viewed November 10, 2020) | ||
| 520 | |a Course content reaffirmed: 06/2015--This tutorial walks you through the initial steps in designing an SRAM and then focuses on the first circuit that we must design - the memory cell. An overview of the architecture will be presented in a block diagram that will describe the functions of the major blocks required to create an SRAM. A large portion of this video will be dedicated to the design and layout of the memory cell (also called the bit cell) and how it is arrayed. It starts with a description of how the memory cell works then analyzes how the cell is read and written, with specific attention paid to read disturb which can cause the cell to inadvertently flip when it is read. Waveforms from SPICE simulations of the memory cell will be presented along with a SPICE input file that can be used to create your own simulations. A SPICE netlist from the layout of the memory cell will also be supplied so that the actual parasitic capacitance can be included in the simulations. Suggested order for proceeding through the IEEE eLearning Series on Design of Integrated Circuits tutorials: 1. Integrated Circuit Digital Design Methodology; 2. Integrated Circuit Digital Design Methodology - Advanced Analysis and Simulation; 3. SRAM Design - Overview and Memory Cell Division; 4. SRAM Design - Array Design and Precharge; 5. SRAM Design - Sensing Scheme; 6. SRAM Design - MUX Factor and Data Buffer; 7. SRAM Design - Write Path; 8. SRAM Design - ROW Decoder; 9. SRAM Design - Address Buffer; 10. SRAM Design - Clock Buffer; 11. SRAM Design - Control Circuitry; 12. SRAM Design - Sensing and Write Control | ||
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Datensatz im Suchindex
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| _version_ | 1820896164580425728 |
| any_adam_object | |
| author | Sheppard, Doug |
| author_facet | Sheppard, Doug |
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| author_sort | Sheppard, Doug |
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| dewey-full | 621.38173 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.38173 |
| dewey-search | 621.38173 |
| dewey-sort | 3621.38173 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| format | Electronic Video |
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Integrated Circuit Digital Design Methodology - Advanced Analysis and Simulation; 3. SRAM Design - Overview and Memory Cell Division; 4. SRAM Design - Array Design and Precharge; 5. SRAM Design - Sensing Scheme; 6. SRAM Design - MUX Factor and Data Buffer; 7. SRAM Design - Write Path; 8. SRAM Design - ROW Decoder; 9. SRAM Design - Address Buffer; 10. SRAM Design - Clock Buffer; 11. SRAM Design - Control Circuitry; 12. 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| id | DE-604.BV047477073 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-24T08:56:34Z |
| institution | BVB |
| isbn | 9781424430048 |
| language | English |
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| publishDate | 2009 |
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| publishDateSort | 2009 |
| publisher | IEEE |
| record_format | marc |
| spellingShingle | Sheppard, Doug SRAM design - overview and memory cell division Integrated circuits Random access memory |
| subject_GND | (DE-588)4017102-4 |
| title | SRAM design - overview and memory cell division |
| title_alt | Static random-access memory design - overview and memory cell division |
| title_auth | SRAM design - overview and memory cell division |
| title_exact_search | SRAM design - overview and memory cell division |
| title_full | SRAM design - overview and memory cell division Doug Sheppard |
| title_fullStr | SRAM design - overview and memory cell division Doug Sheppard |
| title_full_unstemmed | SRAM design - overview and memory cell division Doug Sheppard |
| title_short | SRAM design - overview and memory cell division |
| title_sort | sram design overview and memory cell division |
| topic | Integrated circuits Random access memory |
| topic_facet | Integrated circuits Random access memory Film |
| work_keys_str_mv | AT shepparddoug sramdesignoverviewandmemorycelldivision AT shepparddoug staticrandomaccessmemorydesignoverviewandmemorycelldivision |