Wafer-level testing and test during burn-in for integrated circuits

Wafer-level testing and test during burn-in for integrated circuits

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Bibliographische Detailangaben
1. Verfasser: Bahukudumbi, Sudarshan (VerfasserIn)
Format: Elektronisch E-Book
Sprache:English
Veröffentlicht: Boston Artech House 2010
Schriftenreihe:Artech House integrated microsystems series
Schlagworte:
TECHNOLOGY & ENGINEERING / Electronics / Microelectronics
TECHNOLOGY & ENGINEERING / Electronics / Digital
Integrated circuits / Testing
Integrated circuits / Wafer-scale integration
Semiconductors / Testing
Integrated circuits > Testing > Integrated circuits > Wafer-scale integration > Semiconductors > Testing
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Wafer-level testing and test during burn-in for integrated circuits

Wafer-level testing and test during burn-in for integrated circuits von Bahukudumbi, Sudarshan, Chakrabarty, Krishnendu

Veröffentlicht 2010
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Wafer-level testing and test during burn-in for integrated circuits

Wafer-level testing and test during burn-in for integrated circuits von Bahukudumbi, Sudarshan

Veröffentlicht 2010
Elektronisch E-Book
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Wafer-level testing and test during burn-in for integrated circuits

Wafer-level testing and test during burn-in for integrated circuits von Bahukudumbi, Sudarshan

Veröffentlicht 2010
DE-1046
DE-1047
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Elektronisch E-Book
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Wafer-level testing and test during burn-in for integrated circuits

Wafer-level testing and test during burn-in for integrated circuits von Bahukudumbi, Sudarshan

Veröffentlicht 2010
Elektronisch E-Book
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