VLSI test principles and architectures design for testability

Gespeichert in:

Bibliographische Detailangaben
Weitere Verfasser:	Wang, Laung-Terng (HerausgeberIn), Wen, Xiaoqing (HerausgeberIn)
Format:	Elektronisch E-Book
Sprache:	English
Veröffentlicht:	Amsterdam ; Boston Elsevier Morgan Kaufmann Publishers 2006
Schriftenreihe:	Morgan Kaufmann series in systems on silicon
Schlagworte:	Circuits integres a tres grande echelle / Essais Circuits integres a tres grande echelle / Conception et construction TECHNOLOGY & ENGINEERING / Electronics / Circuits / VLSI & ULSI. TECHNOLOGY & ENGINEERING / Electronics / Circuits / Logic COMPUTERS / Logic Design Integrated circuits / Very large scale integration / Testing Integrated circuits / Very large scale integration / Design Testen VLSI Circuitos integrados vlsi Integrated circuits > Very large scale integration > Testing > Integrated circuits > Very large scale integration > Design
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Inhaltsangabe:

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume. Most up-to-date coverage of design for testability. Coverage of industry practices commonly found in commercial DFT tools but not discussed in other books. Numerous, practical examples in each chapter illustrating basic VLSI test principles and DFT architectures. Lecture slides and exercise solutions for all chapters are now available. Instructors are also eligible for downloading PPT slide files and MSWORD solutions files from the manual website

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