Neural Information Processing and VLSI
Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in order to develop advanced artificial and biologically-inspired neural networks using compact analog and digital VLSI parallel processing techni...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
Boston, MA
Springer US
1995
|
| Schriftenreihe: | The Springer International Series in Engineering and Computer Science
304 |
| Schlagworte: | |
| Online-Zugang: | DE-634 URL des Erstveröffentlichers |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
MARC
| LEADER | 00000nam a2200000zcb4500 | ||
|---|---|---|---|
| 001 | BV045186807 | ||
| 003 | DE-604 | ||
| 005 | 00000000000000.0 | ||
| 007 | cr|uuu---uuuuu | ||
| 008 | 180912s1995 xx o|||| 00||| eng d | ||
| 020 | |a 9781461522478 |9 978-1-4615-2247-8 | ||
| 024 | 7 | |a 10.1007/978-1-4615-2247-8 |2 doi | |
| 035 | |a (ZDB-2-ENG)978-1-4615-2247-8 | ||
| 035 | |a (OCoLC)1053821821 | ||
| 035 | |a (DE-599)BVBBV045186807 | ||
| 040 | |a DE-604 |b ger |e aacr | ||
| 041 | 0 | |a eng | |
| 049 | |a DE-634 | ||
| 082 | 0 | |a 621.3815 |2 23 | |
| 100 | 1 | |a Sheu, Bing J. |e Verfasser |4 aut | |
| 245 | 1 | 0 | |a Neural Information Processing and VLSI |c by Bing J. Sheu, Joongho Choi |
| 264 | 1 | |a Boston, MA |b Springer US |c 1995 | |
| 300 | |a 1 Online-Ressource (XIX, 559 p) | ||
| 336 | |b txt |2 rdacontent | ||
| 337 | |b c |2 rdamedia | ||
| 338 | |b cr |2 rdacarrier | ||
| 490 | 0 | |a The Springer International Series in Engineering and Computer Science |v 304 | |
| 520 | |a Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in order to develop advanced artificial and biologically-inspired neural networks using compact analog and digital VLSI parallel processing techniques. Neural Information Processing and VLSI systematically presents various neural network paradigms, computing architectures, and the associated electronic/optical implementations using efficient VLSI design methodologies. Conventional digital machines cannot perform computationally-intensive tasks with satisfactory performance in such areas as intelligent perception, including visual and auditory signal processing, recognition, understanding, and logical reasoning (where the human being and even a small living animal can do a superb job). | ||
| 520 | |a Recent research advances in artificial and biological neural networks have established an important foundation for high-performance information processing with more efficient use of computing resources. The secret lies in the design optimization at various levels of computing and communication of intelligent machines. Each neural network system consists of massively paralleled and distributed signal processors with every processor performing very simple operations, thus consuming little power. Large computational capabilities of these systems in the range of some hundred giga to several tera operations per second are derived from collectively parallel processing and efficient data routing, through well-structured interconnection networks. Deep-submicron very large-scale integration (VLSI) technologies can integrate tens of millions of transistors in a single silicon chip for complex signal processing and information manipulation. | ||
| 520 | |a The book is suitable for those interested in efficient neurocomputing as well as those curious about neural network system applications. It has been especially prepared for use as a text for advanced undergraduate and first year graduate students, and is an excellent reference book for researchers and scientists working in the fields covered | ||
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Circuits and Systems | |
| 650 | 4 | |a Statistical Physics, Dynamical Systems and Complexity | |
| 650 | 4 | |a Electrical Engineering | |
| 650 | 4 | |a Signal, Image and Speech Processing | |
| 650 | 4 | |a Engineering | |
| 650 | 4 | |a Statistical physics | |
| 650 | 4 | |a Dynamical systems | |
| 650 | 4 | |a Electrical engineering | |
| 650 | 4 | |a Electronic circuits | |
| 650 | 0 | 7 | |a Neuronales Netz |0 (DE-588)4226127-2 |2 gnd |9 rswk-swf |
| 650 | 0 | 7 | |a VLSI |0 (DE-588)4117388-0 |2 gnd |9 rswk-swf |
| 689 | 0 | 0 | |a Neuronales Netz |0 (DE-588)4226127-2 |D s |
| 689 | 0 | 1 | |a VLSI |0 (DE-588)4117388-0 |D s |
| 689 | 0 | |8 1\p |5 DE-604 | |
| 700 | 1 | |a Choi, Joongho |4 aut | |
| 776 | 0 | 8 | |i Erscheint auch als |n Druck-Ausgabe |z 9781461359463 |
| 856 | 4 | 0 | |u https://doi.org/10.1007/978-1-4615-2247-8 |x Verlag |z URL des Erstveröffentlichers |3 Volltext |
| 912 | |a ZDB-2-ENG | ||
| 940 | 1 | |q ZDB-2-ENG_Archiv | |
| 883 | 1 | |8 1\p |a cgwrk |d 20201028 |q DE-101 |u https://d-nb.info/provenance/plan#cgwrk | |
| 943 | 1 | |a oai:aleph.bib-bvb.de:BVB01-030575984 | |
| 966 | e | |u https://doi.org/10.1007/978-1-4615-2247-8 |l DE-634 |p ZDB-2-ENG |q ZDB-2-ENG_Archiv |x Verlag |3 Volltext | |
Datensatz im Suchindex
| _version_ | 1819303582452678656 |
|---|---|
| any_adam_object | |
| author | Sheu, Bing J. Choi, Joongho |
| author_facet | Sheu, Bing J. Choi, Joongho |
| author_role | aut aut |
| author_sort | Sheu, Bing J. |
| author_variant | b j s bj bjs j c jc |
| building | Verbundindex |
| bvnumber | BV045186807 |
| collection | ZDB-2-ENG |
| ctrlnum | (ZDB-2-ENG)978-1-4615-2247-8 (OCoLC)1053821821 (DE-599)BVBBV045186807 |
| dewey-full | 621.3815 |
| dewey-hundreds | 600 - Technology (Applied sciences) |
| dewey-ones | 621 - Applied physics |
| dewey-raw | 621.3815 |
| dewey-search | 621.3815 |
| dewey-sort | 3621.3815 |
| dewey-tens | 620 - Engineering and allied operations |
| discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
| doi_str_mv | 10.1007/978-1-4615-2247-8 |
| format | Electronic eBook |
| fullrecord | <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>04255nam a2200601zcb4500</leader><controlfield tag="001">BV045186807</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">00000000000000.0</controlfield><controlfield tag="007">cr|uuu---uuuuu</controlfield><controlfield tag="008">180912s1995 xx o|||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">9781461522478</subfield><subfield code="9">978-1-4615-2247-8</subfield></datafield><datafield tag="024" ind1="7" ind2=" "><subfield code="a">10.1007/978-1-4615-2247-8</subfield><subfield code="2">doi</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(ZDB-2-ENG)978-1-4615-2247-8</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)1053821821</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV045186807</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">aacr</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-634</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">621.3815</subfield><subfield code="2">23</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Sheu, Bing J.</subfield><subfield code="e">Verfasser</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Neural Information Processing and VLSI</subfield><subfield code="c">by Bing J. Sheu, Joongho Choi</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston, MA</subfield><subfield code="b">Springer US</subfield><subfield code="c">1995</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">1 Online-Ressource (XIX, 559 p)</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">c</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">cr</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="490" ind1="0" ind2=" "><subfield code="a">The Springer International Series in Engineering and Computer Science</subfield><subfield code="v">304</subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in order to develop advanced artificial and biologically-inspired neural networks using compact analog and digital VLSI parallel processing techniques. Neural Information Processing and VLSI systematically presents various neural network paradigms, computing architectures, and the associated electronic/optical implementations using efficient VLSI design methodologies. Conventional digital machines cannot perform computationally-intensive tasks with satisfactory performance in such areas as intelligent perception, including visual and auditory signal processing, recognition, understanding, and logical reasoning (where the human being and even a small living animal can do a superb job). </subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">Recent research advances in artificial and biological neural networks have established an important foundation for high-performance information processing with more efficient use of computing resources. The secret lies in the design optimization at various levels of computing and communication of intelligent machines. Each neural network system consists of massively paralleled and distributed signal processors with every processor performing very simple operations, thus consuming little power. Large computational capabilities of these systems in the range of some hundred giga to several tera operations per second are derived from collectively parallel processing and efficient data routing, through well-structured interconnection networks. Deep-submicron very large-scale integration (VLSI) technologies can integrate tens of millions of transistors in a single silicon chip for complex signal processing and information manipulation. </subfield></datafield><datafield tag="520" ind1=" " ind2=" "><subfield code="a">The book is suitable for those interested in efficient neurocomputing as well as those curious about neural network system applications. It has been especially prepared for use as a text for advanced undergraduate and first year graduate students, and is an excellent reference book for researchers and scientists working in the fields covered</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Circuits and Systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Statistical Physics, Dynamical Systems and Complexity</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Signal, Image and Speech Processing</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Statistical physics</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Dynamical systems</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electrical engineering</subfield></datafield><datafield tag="650" ind1=" " ind2="4"><subfield code="a">Electronic circuits</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Neuronales Netz</subfield><subfield code="0">(DE-588)4226127-2</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Neuronales Netz</subfield><subfield code="0">(DE-588)4226127-2</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">VLSI</subfield><subfield code="0">(DE-588)4117388-0</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="8">1\p</subfield><subfield code="5">DE-604</subfield></datafield><datafield tag="700" ind1="1" ind2=" "><subfield code="a">Choi, Joongho</subfield><subfield code="4">aut</subfield></datafield><datafield tag="776" ind1="0" ind2="8"><subfield code="i">Erscheint auch als</subfield><subfield code="n">Druck-Ausgabe</subfield><subfield code="z">9781461359463</subfield></datafield><datafield tag="856" ind1="4" ind2="0"><subfield code="u">https://doi.org/10.1007/978-1-4615-2247-8</subfield><subfield code="x">Verlag</subfield><subfield code="z">URL des Erstveröffentlichers</subfield><subfield code="3">Volltext</subfield></datafield><datafield tag="912" ind1=" " ind2=" "><subfield code="a">ZDB-2-ENG</subfield></datafield><datafield tag="940" ind1="1" ind2=" "><subfield code="q">ZDB-2-ENG_Archiv</subfield></datafield><datafield tag="883" ind1="1" ind2=" "><subfield code="8">1\p</subfield><subfield code="a">cgwrk</subfield><subfield code="d">20201028</subfield><subfield code="q">DE-101</subfield><subfield code="u">https://d-nb.info/provenance/plan#cgwrk</subfield></datafield><datafield tag="943" ind1="1" ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-030575984</subfield></datafield><datafield tag="966" ind1="e" ind2=" "><subfield code="u">https://doi.org/10.1007/978-1-4615-2247-8</subfield><subfield code="l">DE-634</subfield><subfield code="p">ZDB-2-ENG</subfield><subfield code="q">ZDB-2-ENG_Archiv</subfield><subfield code="x">Verlag</subfield><subfield code="3">Volltext</subfield></datafield></record></collection> |
| id | DE-604.BV045186807 |
| illustrated | Not Illustrated |
| indexdate | 2024-12-24T06:51:40Z |
| institution | BVB |
| isbn | 9781461522478 |
| language | English |
| oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-030575984 |
| oclc_num | 1053821821 |
| open_access_boolean | |
| owner | DE-634 |
| owner_facet | DE-634 |
| physical | 1 Online-Ressource (XIX, 559 p) |
| psigel | ZDB-2-ENG ZDB-2-ENG_Archiv ZDB-2-ENG ZDB-2-ENG_Archiv |
| publishDate | 1995 |
| publishDateSearch | 1995 |
| publishDateSort | 1995 |
| publisher | Springer US |
| record_format | marc |
| series2 | The Springer International Series in Engineering and Computer Science |
| spelling | Sheu, Bing J. Verfasser aut Neural Information Processing and VLSI by Bing J. Sheu, Joongho Choi Boston, MA Springer US 1995 1 Online-Ressource (XIX, 559 p) txt rdacontent c rdamedia cr rdacarrier The Springer International Series in Engineering and Computer Science 304 Neural Information Processing and VLSI provides a unified treatment of this important subject for use in classrooms, industry, and research laboratories, in order to develop advanced artificial and biologically-inspired neural networks using compact analog and digital VLSI parallel processing techniques. Neural Information Processing and VLSI systematically presents various neural network paradigms, computing architectures, and the associated electronic/optical implementations using efficient VLSI design methodologies. Conventional digital machines cannot perform computationally-intensive tasks with satisfactory performance in such areas as intelligent perception, including visual and auditory signal processing, recognition, understanding, and logical reasoning (where the human being and even a small living animal can do a superb job). Recent research advances in artificial and biological neural networks have established an important foundation for high-performance information processing with more efficient use of computing resources. The secret lies in the design optimization at various levels of computing and communication of intelligent machines. Each neural network system consists of massively paralleled and distributed signal processors with every processor performing very simple operations, thus consuming little power. Large computational capabilities of these systems in the range of some hundred giga to several tera operations per second are derived from collectively parallel processing and efficient data routing, through well-structured interconnection networks. Deep-submicron very large-scale integration (VLSI) technologies can integrate tens of millions of transistors in a single silicon chip for complex signal processing and information manipulation. The book is suitable for those interested in efficient neurocomputing as well as those curious about neural network system applications. It has been especially prepared for use as a text for advanced undergraduate and first year graduate students, and is an excellent reference book for researchers and scientists working in the fields covered Engineering Circuits and Systems Statistical Physics, Dynamical Systems and Complexity Electrical Engineering Signal, Image and Speech Processing Statistical physics Dynamical systems Electrical engineering Electronic circuits Neuronales Netz (DE-588)4226127-2 gnd rswk-swf VLSI (DE-588)4117388-0 gnd rswk-swf Neuronales Netz (DE-588)4226127-2 s VLSI (DE-588)4117388-0 s 1\p DE-604 Choi, Joongho aut Erscheint auch als Druck-Ausgabe 9781461359463 https://doi.org/10.1007/978-1-4615-2247-8 Verlag URL des Erstveröffentlichers Volltext 1\p cgwrk 20201028 DE-101 https://d-nb.info/provenance/plan#cgwrk |
| spellingShingle | Sheu, Bing J. Choi, Joongho Neural Information Processing and VLSI Engineering Circuits and Systems Statistical Physics, Dynamical Systems and Complexity Electrical Engineering Signal, Image and Speech Processing Statistical physics Dynamical systems Electrical engineering Electronic circuits Neuronales Netz (DE-588)4226127-2 gnd VLSI (DE-588)4117388-0 gnd |
| subject_GND | (DE-588)4226127-2 (DE-588)4117388-0 |
| title | Neural Information Processing and VLSI |
| title_auth | Neural Information Processing and VLSI |
| title_exact_search | Neural Information Processing and VLSI |
| title_full | Neural Information Processing and VLSI by Bing J. Sheu, Joongho Choi |
| title_fullStr | Neural Information Processing and VLSI by Bing J. Sheu, Joongho Choi |
| title_full_unstemmed | Neural Information Processing and VLSI by Bing J. Sheu, Joongho Choi |
| title_short | Neural Information Processing and VLSI |
| title_sort | neural information processing and vlsi |
| topic | Engineering Circuits and Systems Statistical Physics, Dynamical Systems and Complexity Electrical Engineering Signal, Image and Speech Processing Statistical physics Dynamical systems Electrical engineering Electronic circuits Neuronales Netz (DE-588)4226127-2 gnd VLSI (DE-588)4117388-0 gnd |
| topic_facet | Engineering Circuits and Systems Statistical Physics, Dynamical Systems and Complexity Electrical Engineering Signal, Image and Speech Processing Statistical physics Dynamical systems Electrical engineering Electronic circuits Neuronales Netz VLSI |
| url | https://doi.org/10.1007/978-1-4615-2247-8 |
| work_keys_str_mv | AT sheubingj neuralinformationprocessingandvlsi AT choijoongho neuralinformationprocessingandvlsi |