Dynamic reconfigurable network-on-chip design innovations for computational processing and communication
Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. This book is th...
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[2010]
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| 245 | 1 | 0 | |a Dynamic reconfigurable network-on-chip design |b innovations for computational processing and communication |c Jih-Sheng Shen (National Chung Cheng University, Taiwan), Pao-Ann Hsiung (National Chung Cheng University, Taiwan) |
| 264 | 1 | |a Hershey ; New York |b Information Science Reference |c [2010] | |
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| 500 | |a Includes bibliographical references | ||
| 505 | 8 | |a A NoC-Based Infrastructure to Enable Dynamic Self Reconfigurable Systems / Leandro M oller ... [et al.] -- Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers / M ario V estias, Hor acio Neto -- Keys for Administration of Reconfigurable NoC / Rachid Dafali, Jean-Philippe Diguet -- An Efficient Hardware/Software Communication Mechanism for Reconfigurable NoC / Wei-Wen Lin, Jih-Sheng Shen, Pao-Ann Hsiung -- Design Methodologies and Mapping Algorithms for Reconfigurable NoC-Based Systems / Vincenzo Rana, Marco Santambrogio, Alessandro Meroni -- From MARTE to Reconfigurable NoCs / Imran Quadri ... [et al.] -- Dynamic Reconfigurable NoCs / Vincenzo Rana, Marco Santambrogio, Simone Corbetta -- High-Level Programming of Dynamically Reconfigurable NoC-Based Heterogeneous Multicore SoCs / Wim Vanderbauwhede -- Dynamic Reconfigurable NoC (DRNoC) Architecture / Yana Krasteva, Eduardo de la Torre, Teresa Riesgo -- Dynamically Reconfigurable NoC for Future Heterogeneous Multi-core Architectures / Balal Ahmad, Ali Ahmadinia, Tughrul Arslan -- Reliability Aware Performance and Power Optimization in DVFS-Based On-Chip Networks / Aditya Yanamandra ... [et al.] -- SpaceWire Inspired Network-on-Chip Approach for Fault Tolerant System-on-Chip Designs / Bj orn Osterloh, Harald Michalik, Bj orn Fiethe -- A High-Performance and Low-Power On-Chip Network with Reconfigurable Topology / Mehdi Modarressi, Hamid Sarbazi-Azad | |
| 520 | |a Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. This book is the one of the first compilations written to demonstrate this future for network-on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, it represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field | ||
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Datensatz im Suchindex
| _version_ | 1805078993588715520 |
|---|---|
| adam_text | |
| any_adam_object | |
| author2 | Shen, Jih-Sheng Hsiung, Pao-Ann |
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| author_facet | Shen, Jih-Sheng Hsiung, Pao-Ann |
| building | Verbundindex |
| bvnumber | BV044262974 |
| classification_rvk | ST 200 |
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| contents | A NoC-Based Infrastructure to Enable Dynamic Self Reconfigurable Systems / Leandro M oller ... [et al.] -- Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers / M ario V estias, Hor acio Neto -- Keys for Administration of Reconfigurable NoC / Rachid Dafali, Jean-Philippe Diguet -- An Efficient Hardware/Software Communication Mechanism for Reconfigurable NoC / Wei-Wen Lin, Jih-Sheng Shen, Pao-Ann Hsiung -- Design Methodologies and Mapping Algorithms for Reconfigurable NoC-Based Systems / Vincenzo Rana, Marco Santambrogio, Alessandro Meroni -- From MARTE to Reconfigurable NoCs / Imran Quadri ... [et al.] -- Dynamic Reconfigurable NoCs / Vincenzo Rana, Marco Santambrogio, Simone Corbetta -- High-Level Programming of Dynamically Reconfigurable NoC-Based Heterogeneous Multicore SoCs / Wim Vanderbauwhede -- Dynamic Reconfigurable NoC (DRNoC) Architecture / Yana Krasteva, Eduardo de la Torre, Teresa Riesgo -- Dynamically Reconfigurable NoC for Future Heterogeneous Multi-core Architectures / Balal Ahmad, Ali Ahmadinia, Tughrul Arslan -- Reliability Aware Performance and Power Optimization in DVFS-Based On-Chip Networks / Aditya Yanamandra ... [et al.] -- SpaceWire Inspired Network-on-Chip Approach for Fault Tolerant System-on-Chip Designs / Bj orn Osterloh, Harald Michalik, Bj orn Fiethe -- A High-Performance and Low-Power On-Chip Network with Reconfigurable Topology / Mehdi Modarressi, Hamid Sarbazi-Azad |
| ctrlnum | (OCoLC)992530825 (DE-599)BVBBV044262974 |
| discipline | Informatik |
| format | Electronic eBook |
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| series2 | Premier reference source |
| spelling | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen (National Chung Cheng University, Taiwan), Pao-Ann Hsiung (National Chung Cheng University, Taiwan) Hershey ; New York Information Science Reference [2010] © 2010 1 Online-Ressource (xvii, 366 Seiten) txt rdacontent c rdamedia cr rdacarrier Premier reference source Includes bibliographical references A NoC-Based Infrastructure to Enable Dynamic Self Reconfigurable Systems / Leandro M oller ... [et al.] -- Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers / M ario V estias, Hor acio Neto -- Keys for Administration of Reconfigurable NoC / Rachid Dafali, Jean-Philippe Diguet -- An Efficient Hardware/Software Communication Mechanism for Reconfigurable NoC / Wei-Wen Lin, Jih-Sheng Shen, Pao-Ann Hsiung -- Design Methodologies and Mapping Algorithms for Reconfigurable NoC-Based Systems / Vincenzo Rana, Marco Santambrogio, Alessandro Meroni -- From MARTE to Reconfigurable NoCs / Imran Quadri ... [et al.] -- Dynamic Reconfigurable NoCs / Vincenzo Rana, Marco Santambrogio, Simone Corbetta -- High-Level Programming of Dynamically Reconfigurable NoC-Based Heterogeneous Multicore SoCs / Wim Vanderbauwhede -- Dynamic Reconfigurable NoC (DRNoC) Architecture / Yana Krasteva, Eduardo de la Torre, Teresa Riesgo -- Dynamically Reconfigurable NoC for Future Heterogeneous Multi-core Architectures / Balal Ahmad, Ali Ahmadinia, Tughrul Arslan -- Reliability Aware Performance and Power Optimization in DVFS-Based On-Chip Networks / Aditya Yanamandra ... [et al.] -- SpaceWire Inspired Network-on-Chip Approach for Fault Tolerant System-on-Chip Designs / Bj orn Osterloh, Harald Michalik, Bj orn Fiethe -- A High-Performance and Low-Power On-Chip Network with Reconfigurable Topology / Mehdi Modarressi, Hamid Sarbazi-Azad Reconfigurable computing brings immense flexibility to on-chip processing while network-on-chip has improved flexibility in on-chip communication. Integrating these two areas of research reaps the benefits of both and represents the promising future of multiprocessor systems-on-chip. This book is the one of the first compilations written to demonstrate this future for network-on-chip design. Through dynamic and creative research into questions ranging from integrating reconfigurable computing techniques, to task assigning, scheduling and arrival, to designing an operating system to take advantage of the computing and communication flexibilities brought about by run-time reconfiguration and network-on-chip, it represents a complete source of the techniques and applications for reconfigurable network-on-chip necessary for understanding of future of this field Networks on a chip Schaltungsentwurf (DE-588)4179389-4 gnd rswk-swf Elektrisches Netzwerk (DE-588)4014214-0 gnd rswk-swf Chip (DE-588)4197163-2 gnd rswk-swf System-on-Chip (DE-588)4740357-3 gnd rswk-swf (DE-588)4143413-4 Aufsatzsammlung gnd-content System-on-Chip (DE-588)4740357-3 s Elektrisches Netzwerk (DE-588)4014214-0 s Schaltungsentwurf (DE-588)4179389-4 s Chip (DE-588)4197163-2 s DE-604 Shen, Jih-Sheng (DE-588)1026814219 edt Hsiung, Pao-Ann edt Erscheint auch als Druck-Ausgabe 978-1-61520-807-4 Erscheint auch als Druck-Ausgabe 1-61520-807-0 Erscheint auch als Druck-Ausgabe 978-1-61692-320-4 http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-61520-807-4 Verlag URL des Erstveröffentlichers Volltext |
| spellingShingle | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication A NoC-Based Infrastructure to Enable Dynamic Self Reconfigurable Systems / Leandro M oller ... [et al.] -- Dynamically Reconfigurable Networks-on-Chip Using Runtime Adaptive Routers / M ario V estias, Hor acio Neto -- Keys for Administration of Reconfigurable NoC / Rachid Dafali, Jean-Philippe Diguet -- An Efficient Hardware/Software Communication Mechanism for Reconfigurable NoC / Wei-Wen Lin, Jih-Sheng Shen, Pao-Ann Hsiung -- Design Methodologies and Mapping Algorithms for Reconfigurable NoC-Based Systems / Vincenzo Rana, Marco Santambrogio, Alessandro Meroni -- From MARTE to Reconfigurable NoCs / Imran Quadri ... [et al.] -- Dynamic Reconfigurable NoCs / Vincenzo Rana, Marco Santambrogio, Simone Corbetta -- High-Level Programming of Dynamically Reconfigurable NoC-Based Heterogeneous Multicore SoCs / Wim Vanderbauwhede -- Dynamic Reconfigurable NoC (DRNoC) Architecture / Yana Krasteva, Eduardo de la Torre, Teresa Riesgo -- Dynamically Reconfigurable NoC for Future Heterogeneous Multi-core Architectures / Balal Ahmad, Ali Ahmadinia, Tughrul Arslan -- Reliability Aware Performance and Power Optimization in DVFS-Based On-Chip Networks / Aditya Yanamandra ... [et al.] -- SpaceWire Inspired Network-on-Chip Approach for Fault Tolerant System-on-Chip Designs / Bj orn Osterloh, Harald Michalik, Bj orn Fiethe -- A High-Performance and Low-Power On-Chip Network with Reconfigurable Topology / Mehdi Modarressi, Hamid Sarbazi-Azad Networks on a chip Schaltungsentwurf (DE-588)4179389-4 gnd Elektrisches Netzwerk (DE-588)4014214-0 gnd Chip (DE-588)4197163-2 gnd System-on-Chip (DE-588)4740357-3 gnd |
| subject_GND | (DE-588)4179389-4 (DE-588)4014214-0 (DE-588)4197163-2 (DE-588)4740357-3 (DE-588)4143413-4 |
| title | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication |
| title_auth | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication |
| title_exact_search | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication |
| title_full | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen (National Chung Cheng University, Taiwan), Pao-Ann Hsiung (National Chung Cheng University, Taiwan) |
| title_fullStr | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen (National Chung Cheng University, Taiwan), Pao-Ann Hsiung (National Chung Cheng University, Taiwan) |
| title_full_unstemmed | Dynamic reconfigurable network-on-chip design innovations for computational processing and communication Jih-Sheng Shen (National Chung Cheng University, Taiwan), Pao-Ann Hsiung (National Chung Cheng University, Taiwan) |
| title_short | Dynamic reconfigurable network-on-chip design |
| title_sort | dynamic reconfigurable network on chip design innovations for computational processing and communication |
| title_sub | innovations for computational processing and communication |
| topic | Networks on a chip Schaltungsentwurf (DE-588)4179389-4 gnd Elektrisches Netzwerk (DE-588)4014214-0 gnd Chip (DE-588)4197163-2 gnd System-on-Chip (DE-588)4740357-3 gnd |
| topic_facet | Networks on a chip Schaltungsentwurf Elektrisches Netzwerk Chip System-on-Chip Aufsatzsammlung |
| url | http://services.igi-global.com/resolvedoi/resolve.aspx?doi=10.4018/978-1-61520-807-4 |
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