Plasma etching processes for interconnect realization in VLSI
This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions
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| Format: | Elektronisch E-Book |
| Sprache: | English |
| Veröffentlicht: |
London
ISTE Press
2015
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| Online-Zugang: | Volltext |
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| Zusammenfassung: | This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions |
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| Beschreibung: | Includes bibliographical references and index Front Cover ; Plasma Etching Processes for Interconnect Realization in VLSI; Copyright ; Contents ; List of Acronyms ; Preface ; Chapter 1: Introduction ; 1.1. Integration Processes Related to Copper Introduction ; 1.2. Dielectric Material with Low-k Value (<4) ; Chapter 2: Interaction Plasma/Dielectric; 2.1. Porous SiOCH Film Etching; 2.2. Porous SiOCH Film Sensitivity to Post-Etch Treatments ; Chapter 3: Porous SiOCH Film Integration; 3.1. Trench First Metallic Hard Mask Integration ; 3.2. Porous SiOCH Integration Using the Via First Approach ; 3.3. Summary Chapter 4: Interconnects for Tomorrow 4.1. Consequence of Porosity Increase ; 4.2. Process Solutions for Dielectric Constant Reduction ; 4.3. Material Solutions for Dielectric Constant Reduction ; 4.4. Alternative Interconnect Architectures for Dielectric Constant Reduction ; 4.5. Conclusion ; Bibliography ; List of Authors ; Index |
| Beschreibung: | 1 online resource |
| ISBN: | 9780081005903 0081005903 |