Computer architecture pipelined and parallel processor design

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Bibliographische Detailangaben
1. Verfasser: Flynn, Michael J. 1934- (VerfasserIn)
Format: Buch
Sprache:English
Veröffentlicht: Boston [u.a.] Jones and Bartlett 1998
Ausgabe:[Nachdr.]
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MARC

LEADER 00000nam a2200000 c 4500
001 BV017355608
003 DE-604
005 20170407
007 t
008 030729s1998 d||| |||| 00||| eng d
020 |a 0867202041  |9 0-86720-204-1 
035 |a (OCoLC)246239353 
035 |a (DE-599)BVBBV017355608 
040 |a DE-604  |b ger  |e rakwb 
041 0 |a eng 
049 |a DE-29T  |a DE-706 
082 0 |a 004.2/2 
084 |a ST 151  |0 (DE-625)143595:  |2 rvk 
100 1 |a Flynn, Michael J.  |d 1934-  |e Verfasser  |0 (DE-588)172077443  |4 aut 
245 1 0 |a Computer architecture  |b pipelined and parallel processor design  |c Michael J. Flynn 
250 |a [Nachdr.] 
264 1 |a Boston [u.a.]  |b Jones and Bartlett  |c 1998 
300 |a XIX, 788 S.  |b graph. Darst. 
336 |b txt  |2 rdacontent 
337 |b n  |2 rdamedia 
338 |b nc  |2 rdacarrier 
650 0 7 |a Parallelverarbeitung  |0 (DE-588)4075860-6  |2 gnd  |9 rswk-swf 
650 0 7 |a Computerarchitektur  |0 (DE-588)4048717-9  |2 gnd  |9 rswk-swf 
689 0 0 |a Parallelverarbeitung  |0 (DE-588)4075860-6  |D s 
689 0 1 |a Computerarchitektur  |0 (DE-588)4048717-9  |D s 
689 0 |5 DE-604 
999 |a oai:aleph.bib-bvb.de:BVB01-010461204 

Datensatz im Suchindex

_version_ 1804130187500060672
any_adam_object
author Flynn, Michael J. 1934-
author_GND (DE-588)172077443
author_facet Flynn, Michael J. 1934-
author_role aut
author_sort Flynn, Michael J. 1934-
author_variant m j f mj mjf
building Verbundindex
bvnumber BV017355608
classification_rvk ST 151
ctrlnum (OCoLC)246239353
(DE-599)BVBBV017355608
dewey-full 004.2/2
dewey-hundreds 000 - Computer science, information, general works
dewey-ones 004 - Computer science
dewey-raw 004.2/2
dewey-search 004.2/2
dewey-sort 14.2 12
dewey-tens 000 - Computer science, information, general works
discipline Informatik
edition [Nachdr.]
format Book
fullrecord <?xml version="1.0" encoding="UTF-8"?><collection xmlns="http://www.loc.gov/MARC21/slim"><record><leader>01157nam a2200349 c 4500</leader><controlfield tag="001">BV017355608</controlfield><controlfield tag="003">DE-604</controlfield><controlfield tag="005">20170407 </controlfield><controlfield tag="007">t</controlfield><controlfield tag="008">030729s1998 d||| |||| 00||| eng d</controlfield><datafield tag="020" ind1=" " ind2=" "><subfield code="a">0867202041</subfield><subfield code="9">0-86720-204-1</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(OCoLC)246239353</subfield></datafield><datafield tag="035" ind1=" " ind2=" "><subfield code="a">(DE-599)BVBBV017355608</subfield></datafield><datafield tag="040" ind1=" " ind2=" "><subfield code="a">DE-604</subfield><subfield code="b">ger</subfield><subfield code="e">rakwb</subfield></datafield><datafield tag="041" ind1="0" ind2=" "><subfield code="a">eng</subfield></datafield><datafield tag="049" ind1=" " ind2=" "><subfield code="a">DE-29T</subfield><subfield code="a">DE-706</subfield></datafield><datafield tag="082" ind1="0" ind2=" "><subfield code="a">004.2/2</subfield></datafield><datafield tag="084" ind1=" " ind2=" "><subfield code="a">ST 151</subfield><subfield code="0">(DE-625)143595:</subfield><subfield code="2">rvk</subfield></datafield><datafield tag="100" ind1="1" ind2=" "><subfield code="a">Flynn, Michael J.</subfield><subfield code="d">1934-</subfield><subfield code="e">Verfasser</subfield><subfield code="0">(DE-588)172077443</subfield><subfield code="4">aut</subfield></datafield><datafield tag="245" ind1="1" ind2="0"><subfield code="a">Computer architecture</subfield><subfield code="b">pipelined and parallel processor design</subfield><subfield code="c">Michael J. Flynn</subfield></datafield><datafield tag="250" ind1=" " ind2=" "><subfield code="a">[Nachdr.]</subfield></datafield><datafield tag="264" ind1=" " ind2="1"><subfield code="a">Boston [u.a.]</subfield><subfield code="b">Jones and Bartlett</subfield><subfield code="c">1998</subfield></datafield><datafield tag="300" ind1=" " ind2=" "><subfield code="a">XIX, 788 S.</subfield><subfield code="b">graph. Darst.</subfield></datafield><datafield tag="336" ind1=" " ind2=" "><subfield code="b">txt</subfield><subfield code="2">rdacontent</subfield></datafield><datafield tag="337" ind1=" " ind2=" "><subfield code="b">n</subfield><subfield code="2">rdamedia</subfield></datafield><datafield tag="338" ind1=" " ind2=" "><subfield code="b">nc</subfield><subfield code="2">rdacarrier</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Parallelverarbeitung</subfield><subfield code="0">(DE-588)4075860-6</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="650" ind1="0" ind2="7"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="2">gnd</subfield><subfield code="9">rswk-swf</subfield></datafield><datafield tag="689" ind1="0" ind2="0"><subfield code="a">Parallelverarbeitung</subfield><subfield code="0">(DE-588)4075860-6</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2="1"><subfield code="a">Computerarchitektur</subfield><subfield code="0">(DE-588)4048717-9</subfield><subfield code="D">s</subfield></datafield><datafield tag="689" ind1="0" ind2=" "><subfield code="5">DE-604</subfield></datafield><datafield tag="999" ind1=" " ind2=" "><subfield code="a">oai:aleph.bib-bvb.de:BVB01-010461204</subfield></datafield></record></collection>
id DE-604.BV017355608
illustrated Illustrated
indexdate 2024-07-09T19:17:03Z
institution BVB
isbn 0867202041
language English
oai_aleph_id oai:aleph.bib-bvb.de:BVB01-010461204
oclc_num 246239353
open_access_boolean
owner DE-29T
DE-706
owner_facet DE-29T
DE-706
physical XIX, 788 S. graph. Darst.
publishDate 1998
publishDateSearch 1998
publishDateSort 1998
publisher Jones and Bartlett
record_format marc
spelling Flynn, Michael J. 1934- Verfasser (DE-588)172077443 aut
Computer architecture pipelined and parallel processor design Michael J. Flynn
[Nachdr.]
Boston [u.a.] Jones and Bartlett 1998
XIX, 788 S. graph. Darst.
txt rdacontent
n rdamedia
nc rdacarrier
Parallelverarbeitung (DE-588)4075860-6 gnd rswk-swf
Computerarchitektur (DE-588)4048717-9 gnd rswk-swf
Parallelverarbeitung (DE-588)4075860-6 s
Computerarchitektur (DE-588)4048717-9 s
DE-604
spellingShingle Flynn, Michael J. 1934-
Computer architecture pipelined and parallel processor design
Parallelverarbeitung (DE-588)4075860-6 gnd
Computerarchitektur (DE-588)4048717-9 gnd
subject_GND (DE-588)4075860-6
(DE-588)4048717-9
title Computer architecture pipelined and parallel processor design
title_auth Computer architecture pipelined and parallel processor design
title_exact_search Computer architecture pipelined and parallel processor design
title_full Computer architecture pipelined and parallel processor design Michael J. Flynn
title_fullStr Computer architecture pipelined and parallel processor design Michael J. Flynn
title_full_unstemmed Computer architecture pipelined and parallel processor design Michael J. Flynn
title_short Computer architecture
title_sort computer architecture pipelined and parallel processor design
title_sub pipelined and parallel processor design
topic Parallelverarbeitung (DE-588)4075860-6 gnd
Computerarchitektur (DE-588)4048717-9 gnd
topic_facet Parallelverarbeitung
Computerarchitektur
work_keys_str_mv AT flynnmichaelj computerarchitecturepipelinedandparallelprocessordesign