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Datensatz im Suchindex
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adam_text | 1992
IEEE INTERNATIONAL SOI CONFERENCE
October
6-8, 1992
AGENDA
Monday. October
5
8:00-10:00
pm Conference Registration
Wine and Cheese Reception
Tuesday. October
б
7:00-8:00
am Continental Breakfast
8:00-8:20
am
8:20-9:00
am
9:00-11:20
am
1.1
1.2
1.3
INTRODUCTORY COMMENTS: J.Brandewie,
J.
Schott, W.Maszara
Silicon-on-Sapphire: A Practical
Material
Larry
Rothrock
(Union Carbide)
[Invited Paper]
SESSION I: MATERIALS PROCESSING
Session Chairman: Peter Roitman
Strain Compensated Epitaxial Etchstop
For BESOI
W.P.Maszara, (Allied-Signal Aerospace
Co., Columbia,MD
21045)
Identification of Optimal Doses for
Device Quality Thin-Film and Standard
SIMOX
Structures Formed By Low
(50keV,
7 0keV or 90keV) or High (200keV) Energy
Oxygen Implantation
CD. Marsh, G.R. Booker (University of
·
Oxford, Oxford, UK); A. Nejim, L.F.
Giles, P.L.F. Hemment (University of
Surrey, Surrey, UK); Y.Li, R.J.
Chater,
J.A. Kilner
(Imperial College of Science
Technology
&
Medicine, London, UK); S.
Wainwright, S. Hall (University of
Liverpool, Liverpool, UK)
Ultrathin SOI Formation by Carbon
Implantation and Layer Transferring
Q.-Y.
Tong,
H.-M.
You,
G.Cha, U.
Goesele (Duke
University, Durham
NC
27706)
8
10
10:00-10:20
am Coffee Break
1.4
Reduced Dislocation Density in
SIMOX
12
Wafer by Multi-Energy Single
Implantation
I. Hamaguchi,
T. Fuj
ita,
T.
Yano,
K. Kajiyama
(Nippon
Steel
Corp.,
Yamaguchi
,
Japan
)
1.5
Determination of Excess Carrier Life-
14
times in Silicon-On-Insulator Wafers by
a Contactless Optical Technique
P.C.Yang, Sheng S. Li (University of
Florida, Gainesville, FL
32611)
1.6
Formation of Ultra Thin SOI-Layer
16
by Implantation of Nitrogen
R. Schork, H. Ryssel
(Fraunhofer-
Arbeitsgruppe
fur
Integrierte
Schaltungen, Erlangen,
Germany)
11:20-1:20
pm
Lunch
1:20-2:00
pm
Wafer Bonding Technology for SOI
18
Applications: A Review
Kiyoshi Mitani
(SEH R&D
Center, Japan)
[Invited Paper]
2:00-4:00
pm SESSION II: MATERIALS CHARACTERIZATION
Session Chairman: Richard Cherne
2.1
Electrolytic Analysis of Oxide Leakage
22
in
SIMOX
Material
L.P. Allen,
A. Genis,
R.
Dolan,
W. Krull
(Ibis Technology Corporation, Danvers,
MA
01923)
2.2
Thermal Oxidation Kinetics and LOCOS
24
Isolation in SOI Materials
Scott Crowder, P. Griffin, J.D.
Plummer
(Stanford University, Stanford, CA
94305)
2:40-3:00
pm Coffee Break
2.3
Electron Traps, Structural Change,
26
and Hydrogen Related
SIMOX
Defects
J.F. Conley, P.M. Lenahan (Pennsylvania
State University, University Park,
PA
16802);
P. Roitman (National Institute of
Standards and Technology, Gaithersberg,
MD
20899)
xi
2.4
Charge
Trapping and Breakdown
28
Mechanism in
SIMOX
Santos Mayo, John S. Suehle, Peter
RoitmAn (National Institute of Standards
and Technology, Gaithersberg, MD
20899)
2.5
A Detailed Investigation of the
30
Pseudo-MOS Transistor for In Situ
Characterization of SOI Wafers
T. Ouisse,
0.
Faynot, J. Margail
(CEA-Technologies
Avancées,
Grenoble,
France); P. Morfouli, H. Seghir,
S. Cristoloveanu (Laboratoire de
Physique
des Composants a Semi¬
conducteurs,
Genoble, France)
4:00-7:00
pm
SESSION
III:
POSTER SESSION
(with wine
and beer)
Session
Chairman: Don
Mayer
[see list of poster presentations below]
INDUSTRIAL
EXHIBITS will also be on
display at this time
5:30-7:00
pm SEMI SOS/SOI Subcommittee Meetings
7:00-8:00
pm No Host Cocktail Bar
8:00
pm Conference Banquet
Banquet Speaker: Dr. Will Stackhouse
Asst. for High Leverage
Technology
Jet Propulsion Laboratory
SESSION III: POSTER SESSION
Session Chairman: Don Mayer
3.1
Suppression of Parasitic Bipolar
34
Effects in SOI MOSFETS by Neutron
Irradiation
A.C.
Ipri, G.M.
Dolny
(David Sarnoff
Research Center, Princeton, NJ
08450)·
D.P
Vu,
M.W.
Batty (Kopin Corporation,
Taunton, MA
02780)
3.2
Charge Trapping and Interface
36
State Generation during Hot-Carrier
Stressing of
SIMOX N-Channel
MOSFETS
«
xii
A.Saleski, J.
P.S. Hanjra,
D.E.
Ioannou
(George
Mason University,
Fairfax,
VA); G.
J.
Campisi,
H.L. Hughes
(Naval
Research
Laboratory, Washington, DC)
3.3
Total Dose Radiation Hardness of
38
Bonded SOI Wafers
J.B. McKitterick,
A.Caviglia,
G.
Goets,
W.
P.
Maszara
(Allied-Signal
Aerospace Technology Center, Columbia, MD)
3.4
Incorporation of Deuterium into the
40
Buried Oxide of
SIMOX
Structures
A.G.Revesz (Revesz Associates, Bethesda,
MD)
;
S.M. Myers
(Sandia
National
Laboratories, Albuqurque, NM)
;
G.A.
Brown (Texas Instruments, Dallas,
TX)
;
H.L.
Hughes (Naval Research Laboratory,
Washington, DC)
3.5
An Advanced CAD Model for the Thin-
42
Film SOI MOSFET
H.B. Abel,
M. Berger, G.
Zimmer
(University of
Duisburg, Duisburg,
Germany
)
3.6
Statistical Analysis of Silicon
44
Defect Densities in
SIMOX
L.
P. Allen,
A. Genis,
W.
Krull (Ibis
Technology Corporation, Danvers, MA)
3.7
RTP Optical Pyrometer Temperature
46
Sensing Anomalies on
SIMOX
S.M. Tyson (United Technologies
Microelectronics Center, Colorado
Springs, CO)
3.8
Atomic Force Microscopy as a Technique
48
for
SIMOX
Material Inspection and
Process Characterization
S.W.
Netherton, S.M. Tyson, G. Matia
(United Technologies Microelectronics
Center, Colorado Springs, CO)
;
W. Tanski,
R. Carroll (United Technologies Research
Center, East Hartford, CT)
3.9
Leakage Currents Reduction at the
50
Gate Edge of SDB SOI NMOS Transistors
Sungweon Kang, Kwangsoo Kim,
Doj
in Kim,
Sangwon Kang (Electronics
&
Tele¬
communications Research Institute,
Dae
j
eon, Korea)
ХШ
З
10
»Intrinsic Gate Capacitances and Large-
52
Signal Transient Modeling of Thm-Film
Accumulation-Mode P-Channel SOI MOSFETs
B. Gentinne,
D.
Flandre,
A. Terao, J.-P.
Colinge
(Université Catholique de
Louvam,
Louvain-la-Neuve,
Belgium)
3.11
High Temperature Characteristics of
54
GAA/SOI Transistors and Circuits
p. Francis, A. Terao,
D. Flandre
(Universite
Catholique de Louvain,
Louvain-la-Neuve,
Belgium)
3.12
Effects of Epitaxial Growth and
56
Subsequent Processing on
SIMOX SOI
Electrical Defect Density
J.M. McNamara, J.F.
Buller
(Harris
Semiconductor, Melbourne, FL)
3.13
Detection of
О.Зшп
Particles on Fully
58
Processed
SIMOX
Wafers
A. Genix, W. Krull (Ibis Technology
Corporation,
Danvers, MA); R.
Lalezari,
J. Turner (Particle Measuring Systems)
3.14
Comparison of the Sensitivity to Heavy
60
Ions of SRAM in Different
SIMOX
Technologies
V. Ferlet-Cavrois, O. Musseau, J.L.
Leray, Y.M. Coic (Centre
ď
etude
de
Bruyères le
Chatel,
Bruyères le Chatel,
France); G. Lecarval, E. Guichard (Centre
d Etude
Nucleaire
de Grenoble, Grenoble,
France)
3.15
Hot
-Carrier
-Induced
Degradation 62
Mechanisms and Anomalous Leakage Current
in Hydrogen
-Pas s
і
va
t
ed
Polysilicon-on-
Insulator LDD p-MOSFETs
S. Bhattacharya, S.
Baner
j
ее, В.-У.
Nguyen, P.
Tobin
(University of Texas,
Austin,
TX)
3.16
Silicon-On-Díamond
Technology
64
N.K. Annamalai (Phillips Laboratory,
Hanscom AFB, MA); P. Fechner (Honeywell,
Plymouth, MN)
;
J. Sawyer (Northeastern
University, Boston, MA)
3.17
120V AC, 250V DC Monolithic Power
66
Supply Made With Bonded Wafer Technology
J.
Beasom
(Harris Semiconductor
Melbourne, FL)
XIV
3.18 Simulation
of
Interface
Coupling and
68
Short-Channel Effects in Fully-Depleted
SOI MOSFETs
A. Hassein-Bey, S. Cristoloveanu
(Laboratoire de
Physique
des Composants a
Semiconducteurs,
Genoble, France)
3.19
Recombination of Oxidation-Induced
70
Silicon Interstitials at Si/SiO2 Inter¬
faces in SOI Structures
J. Boussey-Said,
N.
Guillemot
(Laboratoire de
Physique
des Composants a
Semiconducteurs,
Grenoble, France);
J.
Stoemenos (University of
Thessaloniki,
Thessaloniki,
Greece)
3.20
VLSI SOI Fabrication by
SIMOX
Wafer
72
Bonding (SWB)
O.-Y.
Tong,
U.
Gosele (Duke University,
Durham, NO
3.21
An SOI Performance Sizing Using Transient
74
Finite-Element Modeling
J.A.
Mandelman
(IBM Technology Products,
Essex Junction, VT)
3.22
A Lateral Bipolar Transistor Concept
76
Tested on
SIMOX-
and BSOI-Materials
B. Edholm,
J.
Olsson, A. Soderbarg
(Uppsala
University,
Uppsala,
Sweden)
3.23
The Self-Heating Effect and its
78
Influence on the Electrical Properties
of SOI MOSFETs
Z.
Chai
(Fraunhofer Inst,
of Micro¬
electronic Circuits and Systems,
Duisburg,
Germany)
;
M.
Berger
(University
of
Duisburg, Duisburg,
Germany)
3.24
Effect of Thermal Ramping and Annealing
80
Conditions on Defect Formation in Oxygen
Implanted Silicon-On-Insulator Material
S.J.
Krause,
J.C.
Park,
J.D.
Lee,
(Arizona
State
University,
Tempe,
AZ)
;
M. El-Ghor (Texas Instruments Inc.,
Dallas,
TX);
P. Roitman (National
Institute
of
Standards and Technology,
Gaithersburg, MD)
3.25
Deep Sub-Micron, Bipolar-MOS Hybrid
82
Transistors
Fabricated on
SIMOX
S.A. Parke,
С.
Hu,
Р.К. Ко
(UC
Berkeley, Berkeley,
CA)
XV
З
26
The Enhancement of Gate-Induced-Drain-
84
Leakage (GIDL) Current in SOI MOSFET
and its Impact on SOI Device Scaling
J. Chen, F. Assaderaghi, P.K.
Ko,
C. Hu
(UC Berkeley, Berkeley, CA)
3 27
Analysis of the Latch and Breakdown
86
Phenomena in Thin Film SOI MOSFETs
as a Function of Temperature
F.
Balestra, J.Jomaah
(LPCS/ENSERG,
Grenoble, France)
3.28
Effect of Total Dose Radiation on
88
Device Self Latch-Up
F.T. Brady, N.F. Haddad (IBM Federal
Systems Company, Manassas,
VA);
L. K.
Wang (IBM T.
J.
Watson
Research
Center,
Yorktovm Heights, NY)
3.29
Temperature Sensitivity of Devices and
90
Circuits Fabricated in Fully Depleted
Accumulation Mode CMOS/SOI
F.T. Brady, N.F. Haddad, J.A. Miller, J.
Seliskar (IBM Federal Systems Company,
Manassas,
VA);
L.K.
Wang (IBM T.J.
Watson
Research
Center, Yorktown
Heights, NY)
3.30
Rapid Thermal Processing for Improved
92
Polysilicon SOI NMOSFETs
A. Chand, S. Chandra, S.C. Rustagi,
A.B.
Bhattacharyya (Indian Institute of
Technology, New Delhi, India)
3.31
CMOS/SOS RI-1750AB Processor
94
L.J. Koczela (Rockwell International,
Anaheim, CA)
3.32
-Effect of Temperature Dependent Bipolar
96
Gain Distribution on
SEU
Vulnerability of
SOI CMOS SRAMs
M.L.
Alles, L.W. Massengill, S.E.
Kerns
(Vanderbilt University, Nashville, TN)
K.L. Jones, J.E. Clark, W.F.
Kraus
(Harris Semiconductor, Palm Bay, FL)
3.33
Particle Effects on Buried Oxide
9 8
Leakage in
SIMOX
Materials
я
H.H.
Hosack, K.A. Joyner, M.K. El-Ghor,
J. Hollingsworth, G.A. Brown, G.P.
Pollack (Texas Instruments Incorporated
Dallas,
TX)
3.34
High-Mobility GeSi Quantum-Well PMOS on
100
XVI
D.K.
Nayak, J.
S. Park, J.C.
S.
Woo,
K.L.
Wang, G.
K. Yabiku
(University of California, Los Angeles,
CA)
; K.P.
MacWilliams (The Aerospace
Corporation,
El Segundo, CA)
3.35
Hydrogen Induced Positive Charging of
102
Buried
SÍO2
A. Stesmans and K. Vanheusden
(Katholieke Universiteit Leuven,
Leuven,
Belgium)
3.36
Prediction of the Radiation Response of
104
SIMOX
using
Spectroscopie
Ellipsometry
P.J. McMarr, B.J. Mrstik (Naval Research
Laboratory, Washington, DC); R.K.
Lawrence (ARACOR/SFA, Washington, DC)
3.37
Photocurrent Measurements of Electron
106
Traps is
SIMOX
R.K. Lawrence (ARACOR/SFA, Washington,
DC)
;
H.L. Hughes (Naval Research
Laboratory, Washington, DC)
;
A.G. Revesz
(Revesz Associates, Bethesda, MD)
3.38
Silicon on Diamond (SOD) MOSFETs
108
P.C.
Karulkar (MIT
Lincoln Laboratory,
Lexington, MA)
;
N.K. Annamalai
(Phillips Laboratory, Hanscom AFB, MA)
Wednesday, October
7
7:00-8:00
am Continental Breakfast
8:00-10:00
am SESSION IV: DEVICE CHARACTERIZATION
Session Chairman: Jeong-Mo Hwang
4.1
Measurement of Electron and Hole
112
Saturation Velocities in Silicon
Inversion Layers Using SOI MOSFETs
F. Assaderaghi, J. Chen, P.
Ко, С.
Hu
(UC Berkeley, Berkeley, CA)
4.2
Experimental Analysis of the Film
114
Thickness Influence on the Performance
of Accumulation-Mode
SIMOX
MOSFETs
0.
Faynot
,
A.J. Auberton-Herve (CEA-
Technologies
Avancées,
Grenoble,
France);
S. Cristoloveanu (Laboratoire
de
Physique
des Composants a
Semiconducteurs,
Grenoble, France)
xvii
4 3
The Low-Frequency Noise Behavior of
116
Gate-Ail-Around SOI Transistors
E. Simoen, U.
Magnusson, C. Claeys
(IMEC,
Leuven,
Belgium); J.P.
Colinge
(UCL, Louvain-la-Neuve, Belgium)
4.4
A New Method for Characterizing Dynamic
118
Sel
f
-Heating in SOI MOSFETs
A. Caviglia
(Allied-Signal, Columbia,
MD)
; A.A.
Iliadis (University of
Maryland, College Park, MD)
4.5
A Linear Sweep Technique for Determining
120
Generation Lifetimes in SOI MOSFETs
S. Venkatesan, R.F.
Pierret, G.W. Neudeck
(Purdue University, W. Lafayette, IN)
4.6
Electrical and Thermal Feedback Effects
122
on the Small-Signal Drain Characteristics
of Partially-Depleted SOI MOSFETs
W. Redman-White, R. Howes, M. Lee
(Southampton University, UK)
;
M.J.
Uren,
R.J.
T. Bunyan
(DRA RSRE, Malvern, UK);
J.
Alderman
(National Microelectornics
Research Centre,
Cork, Ireland)
10:00-10:20
am Coffee
Break
10:20-12:00
pm
SESSION V: DEVICE PHYSICS, MODELING, AND
RELIABILITY
Session Chairman: Jerry Fossum
5.1
Front-Channel Hot-Carrier Effect on the
126
Drain-Source Breakdown Voltage in Thin-
Film SOI/NMOSFETs
B. Zhang, T.P. Ma (Yale University, New
Haven, CT)
5.2
Dependence of Fully Depleted SOI MOSFET
128
Breakdown Voltage on Film Thickness and
Channel Length
N.
Kistler, J. Woo (University of
California, Los Angeles, CA)
;
E.
Ver Ploeg,
J.
Plummer (Stanford
University,
Stanford,
CA)
5.3
Activation of NBTI Degradation in SOI
13 0
pMOS by
Se
If-Heating
R.J.T. Bunyan, M.J.
Uren (DRA
Malvern,
Malvern, UK); j.c. Alderman (National
Microelectronics Research Centre, Cork
Ireland); w. Eccleston (University of
Liverpool, Liverpool, UK)
xviii
5.4 Performance
Limitations of Deep-Submicron
132
Fully Depleted SOI MOSFETs
J.G. Fossum, S. Krishnan, P.-C. Yeh
(University of Florida, Gainesville, FL)
5.5
Hot-Carrier Reliability of Fully Depleted
134
Accumulation Mode SOI MOSFETs
A. Acovic, L.K. Wang (IBM T.J. Watson
Research Center,
Yorktown
Heights, NY)
;
F. Brady,
N.
Haddad (IBM Federal Sector
Company,
Mana
ssas, VA)
12:00
pm
Lunch
Afternoon Free
5:00-6:00
pm
No Host Cocktail Bar
6:00-8:00
pm Cookout
8:00-11:00
pm RUMP SESSION
Thursday, October
8
7:00-8:00
am Continental Breakfast
8:00-8:20
am Rump Session Summary
8:20-9:00
am
SIMOX
1992:
Materials and
136
Technology
Wade Krull (Ibis Technology Corp.)
[Invited Paper]
9:00-11:00
am SESSION VI: DEVICE PROCESSING AND NOVEL
DEVICES
Session Chairman: Wade Krull
6.1
Analysis of Snapback in SOI nMOSFETs
140
and its Use for an SOI
ESD
Protection
Circuit
K. Verhaege, G. Groeseneken, H.E. Maes
(IMEC,
Leuven,
Belgium); J.P.
Colinge
(UCL, Louvain-La
-Neuve,
Belgium)
6.2
Complementary, High-Performance Lateral
142
BJTs in
a SIMOX C-BiCMOS
Technology
S.A. Parke,
С.
Hu,
Ping
К.
Ko (UC
Berkeley, Berkeley, CA)
6.3
MICROX™- An Ail Silicon Microwave
144
Technology
A.K. Agarwal, M.H.
Hanes,
T.W.
xix
O Keeffe,
J.R-
Szedőn,
H.M. Hobgood,
T.J.
Smith, CD. Brandt, M.C. Driver,
R.N. Thomas, H.C. Nathanson (Westing-
house Science
&
Technology Center,
Pittsburg, PA)
10:00-10:20
am Coffee Break
6.4
SOI High Voltage LDMOS and LIGBT
146
Transistors with a Buried Diode and
Surface P-Layer
H.
Pein,
E.
Arnold,
H.
Baumgart,
R.
Egloff,
T.
Létavic,
S.
Merchant,
S.
Mukherjee (Phillips Laboratories,
Briarcliff
Manor, NY)
6.5
New
Gate
Electrodes
for Fully-Depleted
148
SOI/CMOS; TiN
and Poly
S
i-Ge
J.
-M.
Hwang,
G.
Pollack
(Texas
Instruments, Dallas,
TX)
11:00-12:00
pm LATE
NEWS SESSION
Session Chairman: John
Schott
LI Plasma Thinned SOI Bonded Wafers
152
P.B. Mumola, G.J. Gardopee, P.J. Clapis,
C.B.
Zarowin, L.D. Bollinger, A.M.
Ledger (Hughes Danbury Optical Systems,
Danbury, CT)
L2 Initial Evaluation of CMOS/SOI Devices
154
Fabricated on Plasma-Thinned Bonded
Silicon Wafers
K. Aubuchon, J. Pinter, M. Matloubian,
M. Barger, R. McClain,
0.
Marsh (Hughes
Aircraft Company, Carlsbad, CA)
L3 Simulating the Radiation Performance of
156
SIMOX
Buried Oxides using a Trap-Detrap
·
Model
D. Kimpton, j. Kerr (Plessey Semi¬
conductors, Lincoln, United Kingdom)
L4 Quality of Gate Oxides Grown on State
158
of the Art
SIMOX
and ZMR SOI Substrates
P.C.
Karulkar (MIT
Lincoln Laboratory,
Lexington, MA)
12:00-1:30
pm Lunch
1:30-3:10
pm SESSION
VII
s
ADVANCED CIRCUIT APPLICATIONS
Session Chairman: Jay
Schrankler
XX
7.1
Performances
of Fully-Depleted SOI Analog
162
Operational Amplifiers
B. Gentinne,
J.P.
Colinge,
P.
G.A. Jespers
(Universite
Catholique de Louvain, Louvain-
la-Neuve,
Belgium)
7.2
Design Techniques
for High-Speed Low-
164
Power and High-Temperature Digital CMOS
Circuits on SOI
D. Flandre,
С
Jacquemin, J.-P
Colinge
(Universite
Catholique de Louvain, Louvain-
la-Neuve,
Belgium)
7.3
Revenue
Potential
from
SOI Production
166
T. Stanley (SEMATECH,
Austin,
TX)
7.4
A 20ns Multiple Architecture 256K
SIMOX
168
SRAM
Designed
for Harsh
Radiation
Environments
W.F.
Kraus,
B.R.
Doyle, J.E. Clark, K.L.
Jones, D.M. Thornberry (Harris
Semi¬
conductor
Military
and Aerospace
Division,
Melbourne, FL)
7.5
Comparison of SOI
Versus
Bulk
Silicon 170
Substrate
Crosstalk Properties for Mixed-
Mode
1С
s
I. Rahim, B.-Y. Hwang, J. Foerstner
(Motorola, Mesa, AZ)
3:10-3:30
pm Coffee Break
3:30
pm BEST PAPER AWARD/CONCLUDING REMARKS
Jerry Brandewie
XXI
|
any_adam_object | 1 |
author_corporate | International SOI Conference Ponte Vedra Beach, Fla |
author_corporate_role | aut |
author_facet | International SOI Conference Ponte Vedra Beach, Fla |
author_sort | International SOI Conference Ponte Vedra Beach, Fla |
building | Verbundindex |
bvnumber | BV009584827 |
classification_rvk | ZN 4960 |
classification_tum | ELT 364f |
ctrlnum | (OCoLC)633807833 (DE-599)BVBBV009584827 |
discipline | Elektrotechnik / Elektronik / Nachrichtentechnik |
format | Conference Proceeding Book |
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genre | (DE-588)1071861417 Konferenzschrift 1992 Ponte Vedra Beach Fla. gnd-content |
genre_facet | Konferenzschrift 1992 Ponte Vedra Beach Fla. |
id | DE-604.BV009584827 |
illustrated | Illustrated |
indexdate | 2024-12-23T13:21:54Z |
institution | BVB |
institution_GND | (DE-588)5085328-4 |
isbn | 0780307763 0780307771 078030778X |
language | Undetermined |
oai_aleph_id | oai:aleph.bib-bvb.de:BVB01-006334791 |
oclc_num | 633807833 |
open_access_boolean | |
owner | DE-91 DE-BY-TUM DE-83 |
owner_facet | DE-91 DE-BY-TUM DE-83 |
physical | XXII, 171 S. Ill., zahlr. graph. Darst. |
publishDate | 1992 |
publishDateSearch | 1992 |
publishDateSort | 1992 |
publisher | IEEE Service Center |
record_format | marc |
spellingShingle | Proceedings Telekommunikationsnetz (DE-588)4133586-7 gnd Datennetz (DE-588)4011130-1 gnd SOI-Technik (DE-588)4128029-5 gnd |
subject_GND | (DE-588)4133586-7 (DE-588)4011130-1 (DE-588)4128029-5 (DE-588)1071861417 |
title | Proceedings |
title_auth | Proceedings |
title_exact_search | Proceedings |
title_full | Proceedings IEEE International Soi Conference 1992 |
title_fullStr | Proceedings IEEE International Soi Conference 1992 |
title_full_unstemmed | Proceedings IEEE International Soi Conference 1992 |
title_short | Proceedings |
title_sort | proceedings |
topic | Telekommunikationsnetz (DE-588)4133586-7 gnd Datennetz (DE-588)4011130-1 gnd SOI-Technik (DE-588)4128029-5 gnd |
topic_facet | Telekommunikationsnetz Datennetz SOI-Technik Konferenzschrift 1992 Ponte Vedra Beach Fla. |
url | http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=006334791&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA |
work_keys_str_mv | AT internationalsoiconferencepontevedrabeachfla proceedings |