Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada

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Körperschaft: International Symposium on Multiple Valued Logic Victoria, British Columbia (VerfasserIn)
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Sprache:English
Veröffentlicht: Los Alamitos [u.a.] IEEE Computer Soc. Press 1991
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Datensatz im Suchindex

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adam_text Table of Contents Symposium Chaiťs Message .................................... v Program Chaiťs Message ...................................... vi Message from the Chair of the Technical Committee ...................... .vii Referees ..............................................viii SESSIONI: Invited Address Reasoning About Digital Systems ..................................2 A.S. Wojcik SESSION Па: Applications I Design of a Set Logic Network Based on Frequency Multiplexing and Its Applications to Image Processing .............................8 Y. Yuminaka, T. Aoki, and T. Higuchi A Multiple-Valued Logic Array VLSI Based on Two-Transistor Delta Literal Circuit and Its Application to Real-Time Reasoning Systems ..................16 T. Hanyu, Y. Kojima, and T. Higuchi A Floating-Gate-MOS-Based Multiple-Valued Associative Memory ..............................................24 T. Hanyu and T. Higuchi Application of Multi-Zero Artificial Neural Network to the Design of an M-Valued Digital Multiplier ....................................32 C.-L. J. Ни SESSION ПЬ: Logic Multiple-Valued Generalized Reed-Muller Forms ........................40 /. Schäfer and M Л. Perkowski A Non-Commutative Multiple-Valued Logic ...........................49 RJ. Bignall On the Complexity of Enumerations for Multiple-Valued Kleenean Functions and Unate Functions ........................................55 Y. Hata, M. Yuhara, F. Miyawaki, and K. Yamato Fundamental Properties of Kleene-Stone Logic Functions ....................63 N. Takagi andM. Mukaidono SESSION Ша: Fuzzy Logic A Formal Semantical Approach to Fuzzy Logic ..........................72 L. Godo, F. Esteva, P. Garcia, and J. Agusti-Cullell Topological Soft Algebra for the SS-Modal Fuzzy Logic .....................80 A. Nakamura Recognition of Circle Form Using Fuzzy Sequential System ...................85 T. Watanabe andM.Matsumoto SESSION ШЬ: Symmetric Functions/Error Correction Worst Case Number of Terms in Symmetric Multiple-Valued Functions ............94 J.T. Butler and К A Schueller Quaternary Cyclic AN Codes for Burst Error Correction ....................102 Y. Okura, R. Shimada, and T. Hasegawa On the Maximum Size of the Teims in the Realization of Symmetric Functions .......110 R. Tosic, I. Stojmenovic, andM. Miyakawa IX SESSION IV: Invited Address VLSI Fuzzy Chip and Inference Accelerator Board Systems ..................120 H. Watanabe, J.R. Symon, W.D. Dettloff, and K.E. Yount SESSION Va: Cost Tables The Design of Current Mode CMOS Multiple-Valued Circuits .................130 Y.-H. Chang andJ.T. Butler Synthesis of Current-Mode Pass Transistor Networks ......................139 O. Ishizuka, H. Takarabe, Z. Tang, and H. Matsumoto On the Synthesis of 4- Valued Current Mode CMOS Circuits ..................147 K. Lei and Z.G. Vranesic SESSION Vb: Testability/Bio-Computing Testability Analysis of CMOS Ternary Circuits .........................158 С Rozon and H.T. Mouftah On the Implementation of Set-Valued Non-Boolean Switching Functions ...........166 С Reischer and DA. Simovici Design of Interconnection-Free Biomolecular Computing System ...............173 T. Aoki, M. Kameyama, and T. Higuchi SESSION VI: Invited Address A Decade of Spectral Techniques .................................182 C. Moraga SESSION Vila: Circuits Multiple Peak Resonant Tunneling Diode for Multi- Valued Memory .............190 S.-J. Wei and H.C.Lin A Bi-Directional Current-Mode CMOS Multiple-Valued Logic Memory Circuit .......196 K.W. Current andM.E. Hurlston Proposed CMOS VLSI Implementation of an Electronic Neuron Using Multivalued Signal Processing .........................................203 В A. Taheri Theory of Grounded Current Switches and Quaternary IIL Circuits ..............210 X.Wu and X.Deng SESSION Vnb: Reasoning The Abnormality Predicate ....................................218 E. Neufeld Undecidability in the Completion of Truth-Function Logic ...................225 F J. Wroblewski Improving Tableau Deductions in Multiple-Valued Logics ...................230 N.V. Murray and E. Rosenthal Uniform Notation of Tableau Rules for Multiple-Valued Logics ................238 R. Hahnle SESSION ТПа: Algebra Theory and Uses of Post Algebras of Order ож»*. Partii................... 248 G. Epstein and H. Rasiowa NPN Calculi: A Family of Three Strict Q- Algebras .......................255 W.-R. Zhang A Note on Minimal Partial Clones ................................262 F. Borner, L. Haddad, and R. Poschel SESSION Vmb: Function Minimization A Transformation of Multiple-Valued Input Two-Valued Output Functions and its Application to Simplification of Exclusive-or Sum-of-Products Expressions .......270 T. Sasao On the Maximum Number of Implicante Needed to Cover a Multiple-Valued Logic Function Using Window Literals .............................280 G.W. Dueck and G.HJ. van Rees Parallel Algorithms for Minimizing Multiple-Valued Programmable Logic Arrays ......287 P.P. Tirumalai and V.G. Vadakkencherry SESSION IX: Invited Address Post Relation Algebras and Their Proof System .........................298 E. Orlowska SESSION Xa: Expert Systems An Equational Logic Approach for Mapping Multiple-Valued Rule-Based Expert Systems into Hardware Specification Rules .......................308 D.C. Rine A General-Purpose Inference Processor for Real-Time Intelligent Controllers Using Systolic Arrays ......................................316 C. Lucas, I.B. Turksen, andK.C. Smith An Algorithm for the Solution of Multi-Valued Logic Programming ..............322 Y. Tsuchiya SESSION Xb: Spectral Techniques/Number Systems Multiple-Valued Current-Mode Arithmetic Circuits Based on Redundant Positive-Digit Number Representations .............................330 S. Kawahito, K. Mizuno, and T. Nakamura Spectral Techniques for Multiple-Valued Logic Circuits ....................340 T. R. Damarla and F. Hossain SESSION XIa: Fuzzy Logic Hardware Optimization of Fuzzy Logic Implementation ..........................348 T.-C. Chiueh A Fuzzy Logic Function Generator (FLUG) Implemented with Current Mode CMOS Circuits ..........................................356 M. Sasaki and F. Ueno SESSION Xlb: Programmable Logic An Investigation into the Implementation Costs of Residue and High Radix Arithmetic ....................................364 С Yang, H.-C. Lu, and D E. Gilbert A Comparative Study of Programmable Realization Techniques of Multi-Valued Multi-Threshold Functions ..........................372 MM. Abd-El-Barr, H. Choy, A.K. Jain, and RJ. Bolton Author Index ...........................................383 X] Author Index Abd-El-Barr, M.H ................372 Agusti-Cullell, J .................72 Aoki, T ....................8,173 BignaU.RJ ....................49 Bolton, RJ................... 372 Bomer, F ....................262 Butler.J.T ..................94,130 Chang, Y.-H ...................130 Chiueh, T.-C ..................348 Choy, H .....................372 Current, K.W ..................196 Damarla, TR..................340 Deng, X .....................210 Dettloff, W.D ..................120 Dueck, G.W ...................280 Epstein, G .....................248 Esteva, F .....................72 Garcia, P .....................72 Gilbert, DM ...................364 Godo.L .....................72 Haddad,L ....................262 Hahnle, R ....................238 Hanyu, T ....................16,24 Hasegawa, T ..................102 Hata, Y ......................55 Higuchi.T ................8,16,24,173 Hossain, F.................... 340 Hu, C.-L .....................32 Huriston, MB..................196 Ishizuka, 0................... 139 Jain, A.K ....................372 Kameyama, M .................,173 Kawahito, S ...................330 Kojima, Y .....................16 Lei,K ......................147 lin, H.C .....................190 Lu, H.-C ....................364 Lucas, С ....................316 Matsumoto, H ..................139 Matsumoto, M ..................85 Miyakawa, M. .................110 Miyawaki, F ...................55 Mizuno.K ....................330 Moraga, С.................... 182 Mouftah, H.T ..................158 Mukaidono, M ..................63 Murray, N.V ..................230 Nakamura, A ...................80 Nakamura, T ..................330 Neufeld.E ....................218 Okura, Y ....................102 Orlowska, E ...................298 Perkowski, M.A ..................40 Poschel.R ....................262 Rasiowa, H................... 248 Reischer, С................... 166 Rine, D.C ....................308 Rosenthal, E ...................230 Rozón, С ....................158 Sasaki, M ....................356 Sasao, T .....................270 Schafer, 1 .....................40 SchueUer, K.A ..................94 Shimada, R ...................102 Simovici, D.A ..................166 Smith, K.C ...................316 Stojmenovic, 1 ..................110 Symon, J.R ...................120 Taheri, B.A ...................203 Takagi.N .....................63 Takarabe, H ...................139 Tang, Z .....................139 Tirumalai, P.P ..................287 Tosic.R .....................110 Tsuchiya, Y ...................322 Turksen.I.B ...................316 Ueno, F .....................356 Vadakkencherry, V.G ..............287 van Rees, G.HJ .................280 Vranesic, Z.G ..................147 Watanabe.H ..................120 Watanabe, T ...................85 Wei, S.-J ....................190 Wojcik, A.S ....................2 Wroblewski.FJ .................225 Wu, X ......................210 Yamato, К ....................55 Yang, С .....................364 Yount, K£ ...................120 Yuhara, M ....................55 Yuminaka, Y ...................8 Zhang, W.-R ..................255 383
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spellingShingle Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
Logique du seuil - Congrès
Logique multivalente - Congrès
Théorie de la commutation - Congrès
Many-valued logic Congresses
Switching theory Congresses
Threshold logic Congresses
Mehrwertige Logik (DE-588)4169335-8 gnd
subject_GND (DE-588)4169335-8
(DE-588)1071861417
title Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
title_auth Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
title_exact_search Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
title_full Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
title_fullStr Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
title_full_unstemmed Proceedings of the twenty-first International Symposium on Multiple-Valued Logic May 26 - 29, 1991, Victoria, B.C., Canada
title_short Proceedings of the twenty-first International Symposium on Multiple-Valued Logic
title_sort proceedings of the twenty first international symposium on multiple valued logic may 26 29 1991 victoria b c canada
title_sub May 26 - 29, 1991, Victoria, B.C., Canada
topic Logique du seuil - Congrès
Logique multivalente - Congrès
Théorie de la commutation - Congrès
Many-valued logic Congresses
Switching theory Congresses
Threshold logic Congresses
Mehrwertige Logik (DE-588)4169335-8 gnd
topic_facet Logique du seuil - Congrès
Logique multivalente - Congrès
Théorie de la commutation - Congrès
Many-valued logic Congresses
Switching theory Congresses
Threshold logic Congresses
Mehrwertige Logik
Konferenzschrift 1991 Victoria British Columbia
url http://bvbr.bib-bvb.de:8991/F?func=service&doc_library=BVB01&local_base=BVB01&doc_number=003703472&sequence=000002&line_number=0001&func_code=DB_RECORDS&service_type=MEDIA
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