Revisited parasitic bipolar effect in FDSOI MOSFETs: Mechanism, gain extraction and circuit applications
•The PBE in FDSOI transistors is revisited including impact ionization and band-to-band tunneling.•The impact of PBE on the power consumption and performance of SRAM circuits is studied.•A strategy to counter PBE is proposed based on the power analysis of 6T SRAM with back-gate modulation. The paras...
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| Veröffentlicht in: | Solid-state electronics 2021-11, Vol.185, p.108069, Article 108069 |
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| creator | Wang, G.Q. Liu, F.Y. Li, B. Luo, J.J. Huang, Y. Su, X.H. Han, Z.S. Zhang, J.J. Wang, Y.C. Wu, C.N. Zhang, J.M. Cristoloveanu, S. |
| description | •The PBE in FDSOI transistors is revisited including impact ionization and band-to-band tunneling.•The impact of PBE on the power consumption and performance of SRAM circuits is studied.•A strategy to counter PBE is proposed based on the power analysis of 6T SRAM with back-gate modulation.
The parasitic bipolar effect in fully-depleted (FD) silicon-on-insulator (SOI) transistors is revisited including impact ionization and band-to-band tunneling. We tested the transfer characteristic curves for different temperature and drain voltage, combined with TCAD simulation to analyze the dominant mechanism of parasitic bipolar transistor (PBT). In addition, the influence of gate length on PBT has also been analyzed. The current gain β of the PBT was measured at different temperatures and drain voltages. Back-gate biasing was demonstrated to efficiently suppress the bipolar amplification. TCAD simulations showed that the parasitic bipolar effect enhanced the leakage power in circuits. A strategy to counter its effect is proposed based on the power analysis of 6 T SRAM cell with back-gate modulation. |
| doi_str_mv | 10.1016/j.sse.2021.108069 |
| format | Article |
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The parasitic bipolar effect in fully-depleted (FD) silicon-on-insulator (SOI) transistors is revisited including impact ionization and band-to-band tunneling. We tested the transfer characteristic curves for different temperature and drain voltage, combined with TCAD simulation to analyze the dominant mechanism of parasitic bipolar transistor (PBT). In addition, the influence of gate length on PBT has also been analyzed. The current gain β of the PBT was measured at different temperatures and drain voltages. Back-gate biasing was demonstrated to efficiently suppress the bipolar amplification. TCAD simulations showed that the parasitic bipolar effect enhanced the leakage power in circuits. A strategy to counter its effect is proposed based on the power analysis of 6 T SRAM cell with back-gate modulation.</description><identifier>ISSN: 0038-1101</identifier><identifier>EISSN: 1879-2405</identifier><identifier>DOI: 10.1016/j.sse.2021.108069</identifier><language>eng</language><publisher>OXFORD: Elsevier Ltd</publisher><subject>Back-gate ; Band-to-band tunneling ; Engineering ; Engineering, Electrical & Electronic ; FD-SOI ; Impact ionization ; Leakage power ; Parasitic bipolar gain ; Physical Sciences ; Physics ; Physics, Applied ; Physics, Condensed Matter ; Science & Technology ; Technology</subject><ispartof>Solid-state electronics, 2021-11, Vol.185, p.108069, Article 108069</ispartof><rights>2021 Elsevier Ltd</rights><lds50>peer_reviewed</lds50><woscitedreferencessubscribed>true</woscitedreferencessubscribed><woscitedreferencescount>2</woscitedreferencescount><woscitedreferencesoriginalsourcerecordid>wos000701908200011</woscitedreferencesoriginalsourcerecordid><citedby>FETCH-LOGICAL-c297t-2545a35195cd9c2f7be0d3ba3ea9c726d090c366f0645356ad0d351294dc0f023</citedby><cites>FETCH-LOGICAL-c297t-2545a35195cd9c2f7be0d3ba3ea9c726d090c366f0645356ad0d351294dc0f023</cites></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://dx.doi.org/10.1016/j.sse.2021.108069$$EHTML$$P50$$Gelsevier$$H</linktohtml><link.rule.ids>315,781,785,3551,27929,27930,39263,46000</link.rule.ids></links><search><creatorcontrib>Wang, G.Q.</creatorcontrib><creatorcontrib>Liu, F.Y.</creatorcontrib><creatorcontrib>Li, B.</creatorcontrib><creatorcontrib>Luo, J.J.</creatorcontrib><creatorcontrib>Huang, Y.</creatorcontrib><creatorcontrib>Su, X.H.</creatorcontrib><creatorcontrib>Han, Z.S.</creatorcontrib><creatorcontrib>Zhang, J.J.</creatorcontrib><creatorcontrib>Wang, Y.C.</creatorcontrib><creatorcontrib>Wu, C.N.</creatorcontrib><creatorcontrib>Zhang, J.M.</creatorcontrib><creatorcontrib>Cristoloveanu, S.</creatorcontrib><title>Revisited parasitic bipolar effect in FDSOI MOSFETs: Mechanism, gain extraction and circuit applications</title><title>Solid-state electronics</title><addtitle>SOLID STATE ELECTRON</addtitle><description>•The PBE in FDSOI transistors is revisited including impact ionization and band-to-band tunneling.•The impact of PBE on the power consumption and performance of SRAM circuits is studied.•A strategy to counter PBE is proposed based on the power analysis of 6T SRAM with back-gate modulation.
The parasitic bipolar effect in fully-depleted (FD) silicon-on-insulator (SOI) transistors is revisited including impact ionization and band-to-band tunneling. We tested the transfer characteristic curves for different temperature and drain voltage, combined with TCAD simulation to analyze the dominant mechanism of parasitic bipolar transistor (PBT). In addition, the influence of gate length on PBT has also been analyzed. The current gain β of the PBT was measured at different temperatures and drain voltages. Back-gate biasing was demonstrated to efficiently suppress the bipolar amplification. TCAD simulations showed that the parasitic bipolar effect enhanced the leakage power in circuits. A strategy to counter its effect is proposed based on the power analysis of 6 T SRAM cell with back-gate modulation.</description><subject>Back-gate</subject><subject>Band-to-band tunneling</subject><subject>Engineering</subject><subject>Engineering, Electrical & Electronic</subject><subject>FD-SOI</subject><subject>Impact ionization</subject><subject>Leakage power</subject><subject>Parasitic bipolar gain</subject><subject>Physical Sciences</subject><subject>Physics</subject><subject>Physics, Applied</subject><subject>Physics, Condensed Matter</subject><subject>Science & Technology</subject><subject>Technology</subject><issn>0038-1101</issn><issn>1879-2405</issn><fulltext>true</fulltext><rsrctype>article</rsrctype><creationdate>2021</creationdate><recordtype>article</recordtype><sourceid>HGBXW</sourceid><recordid>eNqNkEFPwyAUx4nRxDn9AN64a-eDlrboyVSnS7YscXomFKhj2doGuqnfXmYXj8YTD97_9_L4IXRJYESApDerkfdmRIGScM8h5UdoQPKMRzQBdowGAHEekRA9RWferwCApgQGaPlidtbbzmjcSidDZRUubduspcOmqozqsK3x-GExn-DZfDF-fPW3eGbUUtbWb67xuwxt89k5qTrb1FjWGivr1NZ2WLbt2iq5f_fn6KSSa28uDucQvYVZxXM0nT9NivtppCjPuoiyhMmYEc6U5opWWWlAx6WMjeQqo6kGDipO0wrShMUslTq0GaE80QoqoPEQkX6uco33zlSidXYj3ZcgIPaqxEoEVWKvSvSqApP3zIcpm8ora2plfrngKgPCIaehIqSw3c-PimZbdwG9-j8a0nd92gQDO2ucOBDaumBa6Mb-seY3h7mSCQ</recordid><startdate>202111</startdate><enddate>202111</enddate><creator>Wang, G.Q.</creator><creator>Liu, F.Y.</creator><creator>Li, B.</creator><creator>Luo, J.J.</creator><creator>Huang, Y.</creator><creator>Su, X.H.</creator><creator>Han, Z.S.</creator><creator>Zhang, J.J.</creator><creator>Wang, Y.C.</creator><creator>Wu, C.N.</creator><creator>Zhang, J.M.</creator><creator>Cristoloveanu, S.</creator><general>Elsevier Ltd</general><general>Elsevier</general><scope>BLEPL</scope><scope>DTL</scope><scope>HGBXW</scope><scope>AAYXX</scope><scope>CITATION</scope></search><sort><creationdate>202111</creationdate><title>Revisited parasitic bipolar effect in FDSOI MOSFETs: Mechanism, gain extraction and circuit applications</title><author>Wang, G.Q. ; Liu, F.Y. ; Li, B. ; Luo, J.J. ; Huang, Y. ; Su, X.H. ; Han, Z.S. ; Zhang, J.J. ; Wang, Y.C. ; Wu, C.N. ; Zhang, J.M. ; Cristoloveanu, S.</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-LOGICAL-c297t-2545a35195cd9c2f7be0d3ba3ea9c726d090c366f0645356ad0d351294dc0f023</frbrgroupid><rsrctype>articles</rsrctype><prefilter>articles</prefilter><language>eng</language><creationdate>2021</creationdate><topic>Back-gate</topic><topic>Band-to-band tunneling</topic><topic>Engineering</topic><topic>Engineering, Electrical & Electronic</topic><topic>FD-SOI</topic><topic>Impact ionization</topic><topic>Leakage power</topic><topic>Parasitic bipolar gain</topic><topic>Physical Sciences</topic><topic>Physics</topic><topic>Physics, Applied</topic><topic>Physics, Condensed Matter</topic><topic>Science & Technology</topic><topic>Technology</topic><toplevel>peer_reviewed</toplevel><toplevel>online_resources</toplevel><creatorcontrib>Wang, G.Q.</creatorcontrib><creatorcontrib>Liu, F.Y.</creatorcontrib><creatorcontrib>Li, B.</creatorcontrib><creatorcontrib>Luo, J.J.</creatorcontrib><creatorcontrib>Huang, Y.</creatorcontrib><creatorcontrib>Su, X.H.</creatorcontrib><creatorcontrib>Han, Z.S.</creatorcontrib><creatorcontrib>Zhang, J.J.</creatorcontrib><creatorcontrib>Wang, Y.C.</creatorcontrib><creatorcontrib>Wu, C.N.</creatorcontrib><creatorcontrib>Zhang, J.M.</creatorcontrib><creatorcontrib>Cristoloveanu, S.</creatorcontrib><collection>Web of Science Core Collection</collection><collection>Science Citation Index Expanded</collection><collection>Web of Science - Science Citation Index Expanded - 2021</collection><collection>CrossRef</collection><jtitle>Solid-state electronics</jtitle></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext</fulltext></delivery><addata><au>Wang, G.Q.</au><au>Liu, F.Y.</au><au>Li, B.</au><au>Luo, J.J.</au><au>Huang, Y.</au><au>Su, X.H.</au><au>Han, Z.S.</au><au>Zhang, J.J.</au><au>Wang, Y.C.</au><au>Wu, C.N.</au><au>Zhang, J.M.</au><au>Cristoloveanu, S.</au><format>journal</format><genre>article</genre><ristype>JOUR</ristype><atitle>Revisited parasitic bipolar effect in FDSOI MOSFETs: Mechanism, gain extraction and circuit applications</atitle><jtitle>Solid-state electronics</jtitle><stitle>SOLID STATE ELECTRON</stitle><date>2021-11</date><risdate>2021</risdate><volume>185</volume><spage>108069</spage><pages>108069-</pages><artnum>108069</artnum><issn>0038-1101</issn><eissn>1879-2405</eissn><abstract>•The PBE in FDSOI transistors is revisited including impact ionization and band-to-band tunneling.•The impact of PBE on the power consumption and performance of SRAM circuits is studied.•A strategy to counter PBE is proposed based on the power analysis of 6T SRAM with back-gate modulation.
The parasitic bipolar effect in fully-depleted (FD) silicon-on-insulator (SOI) transistors is revisited including impact ionization and band-to-band tunneling. We tested the transfer characteristic curves for different temperature and drain voltage, combined with TCAD simulation to analyze the dominant mechanism of parasitic bipolar transistor (PBT). In addition, the influence of gate length on PBT has also been analyzed. The current gain β of the PBT was measured at different temperatures and drain voltages. Back-gate biasing was demonstrated to efficiently suppress the bipolar amplification. TCAD simulations showed that the parasitic bipolar effect enhanced the leakage power in circuits. A strategy to counter its effect is proposed based on the power analysis of 6 T SRAM cell with back-gate modulation.</abstract><cop>OXFORD</cop><pub>Elsevier Ltd</pub><doi>10.1016/j.sse.2021.108069</doi><tpages>7</tpages></addata></record> |
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| subjects | Back-gate Band-to-band tunneling Engineering Engineering, Electrical & Electronic FD-SOI Impact ionization Leakage power Parasitic bipolar gain Physical Sciences Physics Physics, Applied Physics, Condensed Matter Science & Technology Technology |
| title | Revisited parasitic bipolar effect in FDSOI MOSFETs: Mechanism, gain extraction and circuit applications |
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