Vertical current transport processes in MOS-HEMT heterostructures

[Display omitted] •Introduction of integral electron trap-assisted and direct tunnelling transport velocities for thin oxide layers.•Calculation of the applied voltage Va divided between the oxide layer and semiconductor.•Physically correct explanation of the high values of the ideality factor η.•Developing an original model of the current transport in MOS structure. The nature of vertical electron transport through MIS structures has not been fully understood until now. This applies all the more to metal/Al2O3/GaN/AlGaN/GaN heterostructures used in GaN-based MOS-HEMTs. Devices based on such heterostructures are utilized in power electronics applications and are frequently intended for use at very high temperatures. Regrettably, there are only few works dealing with the effect of heat on the current transport in such devices. Therefore, we describe a novel model for vertical electron transport through GaN-based MOS-HEMT structures, simulate the gate currents, and compare the results with experimental high-temperature I-V curves. In the present paper we show that trap-assisted tunnelling (TAT) between the metal and the surface of the semiconductor is the main transport mechanism in such MOS structures.