Apparatus and method and computer program product for compiling code adapted for secondary offloads in graphics processing unit
The invention relates to a method for compiling code adapted for secondary offloads in a graphics processing unit (GPU). The method, performed by a processing unit, includes: reconstructing execution codes in a first kernel into a second kernel. The second kernel includes an operation table includin...
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creator | SHANGHAI BIREN TECHNOLOGY CO., LTD |
description | The invention relates to a method for compiling code adapted for secondary offloads in a graphics processing unit (GPU). The method, performed by a processing unit, includes: reconstructing execution codes in a first kernel into a second kernel. The second kernel includes an operation table including entries, and computation codes. The computation codes include a portion of the execution codes, and synchronization hooks, and each synchronization hook includes information indicating one entry of the operation table. An order of the portion of the execution codes and the synchronization hooks in the computation codes matches an order of the execution codes in the first kernel, thereby enabling a compute unit (CU) in the GPU to execute the computation codes, and an engine in the GPU to instruct a component inside or outside of the GPU to complete a designated operation in accordance with content of each entry in the operation table. |
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The method, performed by a processing unit, includes: reconstructing execution codes in a first kernel into a second kernel. The second kernel includes an operation table including entries, and computation codes. The computation codes include a portion of the execution codes, and synchronization hooks, and each synchronization hook includes information indicating one entry of the operation table. An order of the portion of the execution codes and the synchronization hooks in the computation codes matches an order of the execution codes in the first kernel, thereby enabling a compute unit (CU) in the GPU to execute the computation codes, and an engine in the GPU to instruct a component inside or outside of the GPU to complete a designated operation in accordance with content of each entry in the operation table.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2023</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjE0KwjAQRrtxIeod5gKCRaFuRRQP4F6GzKQNtJmQmSxceXWb4gFcvQffz7r5XFLCjFYUMBJMbIPQok6mVIwzpCx9xqmSijPwkpcwjCH2sxEDEiZjWiJlJ5Ewv0G8HwVJIUSYH9IQnNYXx6p1WmKwbbPyOCrvftw0cL89r4990YTG0fQ1TyvatjudD113_KPyBdOuSnM</recordid><startdate>20230905</startdate><enddate>20230905</enddate><creator>SHANGHAI BIREN TECHNOLOGY CO., LTD</creator><scope>EFH</scope></search><sort><creationdate>20230905</creationdate><title>Apparatus and method and computer program product for compiling code adapted for secondary offloads in graphics processing unit</title></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_117480773</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2023</creationdate><toplevel>online_resources</toplevel><creatorcontrib>SHANGHAI BIREN TECHNOLOGY CO., LTD</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><aucorp>SHANGHAI BIREN TECHNOLOGY CO., LTD</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Apparatus and method and computer program product for compiling code adapted for secondary offloads in graphics processing unit</title><date>2023-09-05</date><risdate>2023</risdate><abstract>The invention relates to a method for compiling code adapted for secondary offloads in a graphics processing unit (GPU). The method, performed by a processing unit, includes: reconstructing execution codes in a first kernel into a second kernel. The second kernel includes an operation table including entries, and computation codes. The computation codes include a portion of the execution codes, and synchronization hooks, and each synchronization hook includes information indicating one entry of the operation table. An order of the portion of the execution codes and the synchronization hooks in the computation codes matches an order of the execution codes in the first kernel, thereby enabling a compute unit (CU) in the GPU to execute the computation codes, and an engine in the GPU to instruct a component inside or outside of the GPU to complete a designated operation in accordance with content of each entry in the operation table.</abstract><oa>free_for_read</oa></addata></record> |
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title | Apparatus and method and computer program product for compiling code adapted for secondary offloads in graphics processing unit |
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