Computing system including processor and memory which generates wait signal when accessing deteriorated memory area

A computing system includes; a memory having first and second storage areas, and a processor sending a memory control signal to the memory to define a data access period during which data is accessed, and a read source control signal indicating whether the first storage area or the second storage ar...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Lee, Byeonghoon, Kim, Ki Hong, Cho, Hyuck Jun
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
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