Power-saving receiver circuits, systems and processes

Power-saving receiver circuits, systems and processes

ONOFFAn electronic circuit includes a receiver circuit (BSP) operable to perform coherent summations having a coherent summations time interval, and a power control circuit coupled to said receiver circuit (BSP) and operable to impress a power controlling duty cycle (T, T) on the receiver circuit (B...

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Bibliographische Detailangaben
Hauptverfasser: Waters, Deric Wayne, Ramasubramanian, Karthik, Raghupathy, Arun
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:ONOFFAn electronic circuit includes a receiver circuit (BSP) operable to perform coherent summations having a coherent summations time interval, and a power control circuit coupled to said receiver circuit (BSP) and operable to impress a power controlling duty cycle (T, T) on the receiver circuit (BSP) inside the coherent summations time interval. Other circuits, devices, systems, methods of operation and processes of manufacture are also disclosed.