Non-volatile memory with split write and read bitlines
Read and write operations of a non-volatile memory (NVM) bitcell have different optimum parameters resulting in a conflict during design of the NVM bitcell. A single bitline in the NVM bitcell prevents optimum read performance. Read performance may be improved by splitting the read path and the writ...
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| Format: | Patent |
| Sprache: | eng |
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