Method for enabling multiple incompatible or costly timing environment for efficient timing closure

A method of performing a static timing analysis based on slack values to verify and optimize a logic design includes: selecting one or more circuits within the logic design having at least two inputs taking on a known value; identifying a critical input that controls an output arrival time of the se...

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Bibliographische Detailangaben

Hauptverfasser:	Musante, Frank J, Dougherty, William E, Hieter, Nathaniel D, Suess, Alexander J
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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