Method and arrangement providing for implementation granularity using implementation sets

Method and arrangement providing for implementation granularity using implementation sets

A design hierarchy based on an implementation set abstraction of a user design for an integrated circuit design includes a plurality of nodes and a definition for each of the nodes in the plurality of nodes that describes the type of elements contained in each node and the hierarchy defined by each...

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Hauptverfasser: Kong, Raymond, Downs, Daniel J, Laurence, John J, Sun, Richard Yachyang, Srinivasen, Sankaranarayanan
Format: Patent
Sprache:eng
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creator Kong, Raymond
Downs, Daniel J
Laurence, John J
Sun, Richard Yachyang
Srinivasen, Sankaranarayanan
description A design hierarchy based on an implementation set abstraction of a user design for an integrated circuit design includes a plurality of nodes and a definition for each of the nodes in the plurality of nodes that describes the type of elements contained in each node and the hierarchy defined by each of the nodes. Each node can include at least one implementation element of the design and the at least one implementation element can be selected among the group including a set of logical elements, a set of placed elements, and a set of placed and routed elements.
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