Planarized passivation layer for semiconductor devices

Planarized passivation layer for semiconductor devices

A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a subs...

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Hauptverfasser: Lim, Sin Leng, Kim, In Ki, Park, Jong Sung, Kim, Min Hwan, Lu, Wei
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Sprache:eng
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creator Lim, Sin Leng
Kim, In Ki
Park, Jong Sung
Kim, Min Hwan
Lu, Wei
description A semiconductor device includes a substrate having a dielectric layer and a device layer on the substrate. The device layer has an opening. First and second sublayers are disposed on the device layer and line the opening. The second sublayer serves as a stop layer for planarization to provide a substantially planarized top surface for the semiconductor device.
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title Planarized passivation layer for semiconductor devices
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