Flip chip assembly process for ultra thin substrate and package on package assembly
In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, attaching solder balls to a backside of the coreless substrate strip, and forming a backside stiffening mold amongst the s...
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creator | Mong, Weng Khoon Rudge, A. Vethanayagam Lim, Bok Sim Loke, Mun Leong Ong, Kang Eu Lim, Sih Fei Ong, Tean Wee |
description | In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, attaching solder balls to a backside of the coreless substrate strip, and forming a backside stiffening mold amongst the solder balls. Other embodiments are also disclosed and claimed. |
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Vethanayagam ; Lim, Bok Sim ; Loke, Mun Leong ; Ong, Kang Eu ; Lim, Sih Fei ; Ong, Tean Wee ; Intel Corporation</creatorcontrib><description>In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, attaching solder balls to a backside of the coreless substrate strip, and forming a backside stiffening mold amongst the solder balls. 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Vethanayagam ; Lim, Bok Sim ; Loke, Mun Leong ; Ong, Kang Eu ; Lim, Sih Fei ; Ong, Tean Wee</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_082580193</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Mong, Weng Khoon</creatorcontrib><creatorcontrib>Rudge, A. Vethanayagam</creatorcontrib><creatorcontrib>Lim, Bok Sim</creatorcontrib><creatorcontrib>Loke, Mun Leong</creatorcontrib><creatorcontrib>Ong, Kang Eu</creatorcontrib><creatorcontrib>Lim, Sih Fei</creatorcontrib><creatorcontrib>Ong, Tean Wee</creatorcontrib><creatorcontrib>Intel Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mong, Weng Khoon</au><au>Rudge, A. Vethanayagam</au><au>Lim, Bok Sim</au><au>Loke, Mun Leong</au><au>Ong, Kang Eu</au><au>Lim, Sih Fei</au><au>Ong, Tean Wee</au><aucorp>Intel Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Flip chip assembly process for ultra thin substrate and package on package assembly</title><date>2012-09-04</date><risdate>2012</risdate><abstract>In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including receiving a coreless substrate strip, attaching solder balls to a backside of the coreless substrate strip, and forming a backside stiffening mold amongst the solder balls. Other embodiments are also disclosed and claimed.</abstract><oa>free_for_read</oa></addata></record> |
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title | Flip chip assembly process for ultra thin substrate and package on package assembly |
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