Creating evaluation hardware using a high level modeling system

Within a system comprising a processor and a memory, a method of creating evaluation hardware within an integrated circuit can include automatically inserting, by the processor, a disable circuit block into a circuit design. The method can also include automatically selecting a location within the c...

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Bibliographische Detailangaben
Hauptverfasser: Sundararajan, Arvind, Shirazi, Nabeel
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
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