Multi-level memory access in an optical transceiver
A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corres...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
container_end_page | |
---|---|
container_issue | |
container_start_page | |
container_title | |
container_volume | |
creator | Dybsetter, Gerald L Hahin, Jayne C |
description | A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corresponding segment of memory. The processor reads the access entries for a particular segment of the memory. The processor or other optical transceiver component then determines whether or not to grant access to the memory segment based on the access entry read by the processor. Different levels of access control may be accommodated. |
format | Patent |
fullrecord | <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08200095</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08200095</sourcerecordid><originalsourceid>FETCH-uspatents_grants_082000953</originalsourceid><addsrcrecordid>eNrjZDD2Lc0pydTNSS1LzVHITc3NL6pUSExOTi0uVsjMU0jMU8gvKMlMTsxRKClKzCtOTs0sSy3iYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpQNVAysDCyMDAwNLUmAglAM4WLUs</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Multi-level memory access in an optical transceiver</title><source>USPTO Issued Patents</source><creator>Dybsetter, Gerald L ; Hahin, Jayne C</creator><creatorcontrib>Dybsetter, Gerald L ; Hahin, Jayne C ; Finisar Corporation</creatorcontrib><description>A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corresponding segment of memory. The processor reads the access entries for a particular segment of the memory. The processor or other optical transceiver component then determines whether or not to grant access to the memory segment based on the access entry read by the processor. Different levels of access control may be accommodated.</description><language>eng</language><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8200095$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,778,800,883,64020</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8200095$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Dybsetter, Gerald L</creatorcontrib><creatorcontrib>Hahin, Jayne C</creatorcontrib><creatorcontrib>Finisar Corporation</creatorcontrib><title>Multi-level memory access in an optical transceiver</title><description>A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corresponding segment of memory. The processor reads the access entries for a particular segment of the memory. The processor or other optical transceiver component then determines whether or not to grant access to the memory segment based on the access entry read by the processor. Different levels of access control may be accommodated.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZDD2Lc0pydTNSS1LzVHITc3NL6pUSExOTi0uVsjMU0jMU8gvKMlMTsxRKClKzCtOTs0sSy3iYWBNS8wpTuWF0twMCm6uIc4euqXFBYklqXklxfHpQNVAysDCyMDAwNLUmAglAM4WLUs</recordid><startdate>20120612</startdate><enddate>20120612</enddate><creator>Dybsetter, Gerald L</creator><creator>Hahin, Jayne C</creator><scope>EFH</scope></search><sort><creationdate>20120612</creationdate><title>Multi-level memory access in an optical transceiver</title><author>Dybsetter, Gerald L ; Hahin, Jayne C</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_082000953</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Dybsetter, Gerald L</creatorcontrib><creatorcontrib>Hahin, Jayne C</creatorcontrib><creatorcontrib>Finisar Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Dybsetter, Gerald L</au><au>Hahin, Jayne C</au><aucorp>Finisar Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Multi-level memory access in an optical transceiver</title><date>2012-06-12</date><risdate>2012</risdate><abstract>A mechanism that enables an optical transceiver to grant access to its memory on a per-segment basis. The optical transceiver includes a processor, system memory and a memory access table. The memory access table is comprised of access entries, each of which defines the access condition for a corresponding segment of memory. The processor reads the access entries for a particular segment of the memory. The processor or other optical transceiver component then determines whether or not to grant access to the memory segment based on the access entry read by the processor. Different levels of access control may be accommodated.</abstract><oa>free_for_read</oa></addata></record> |
fulltext | fulltext_linktorsrc |
identifier | |
ispartof | |
issn | |
language | eng |
recordid | cdi_uspatents_grants_08200095 |
source | USPTO Issued Patents |
title | Multi-level memory access in an optical transceiver |
url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T06%3A08%3A44IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Dybsetter,%20Gerald%20L&rft.aucorp=Finisar%20Corporation&rft.date=2012-06-12&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08200095%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |