Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor

A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Coolbaugh, Douglas D, Eshun, Ebenezer E, Gebreselasie, Ephrem G, He, Zhong-Xiang, Ho, Herbert Lei, Kim, Deok-kee, Kothandaraman, Chandrasekharan, Moy, Dan, Rassel, Robert Mark, Safran, John Matthew, Stein, Kenneth Jay, Robson, Norman Whitelaw, Wang, Ping-Chuan, Yan, Hongwen
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Coolbaugh, Douglas D
Eshun, Ebenezer E
Gebreselasie, Ephrem G
He, Zhong-Xiang
Ho, Herbert Lei
Kim, Deok-kee
Kothandaraman, Chandrasekharan
Moy, Dan
Rassel, Robert Mark
Safran, John Matthew
Stein, Kenneth Jay
Robson, Norman Whitelaw
Wang, Ping-Chuan
Yan, Hongwen
description A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08159040</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08159040</sourcerecordid><originalsourceid>FETCH-uspatents_grants_081590403</originalsourceid><addsrcrecordid>eNqNjTEKAjEQRdNYiHqHOYCLERW0XhQbOzsLCZvZbCAmy8zk_k7AA1j9z-d93tK8HiguQXCCELNgICexZGChOkglBJc9fFCm4hUYUvUxhzboa6yMWwUkdq02dFcICDmyFFqbxegS4-aXKwO367O_d5Vn9WXht-pa2PP-dLFHe_gD-QIulTxc</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor</title><source>USPTO Issued Patents</source><creator>Coolbaugh, Douglas D ; Eshun, Ebenezer E ; Gebreselasie, Ephrem G ; He, Zhong-Xiang ; Ho, Herbert Lei ; Kim, Deok-kee ; Kothandaraman, Chandrasekharan ; Moy, Dan ; Rassel, Robert Mark ; Safran, John Matthew ; Stein, Kenneth Jay ; Robson, Norman Whitelaw ; Wang, Ping-Chuan ; Yan, Hongwen</creator><creatorcontrib>Coolbaugh, Douglas D ; Eshun, Ebenezer E ; Gebreselasie, Ephrem G ; He, Zhong-Xiang ; Ho, Herbert Lei ; Kim, Deok-kee ; Kothandaraman, Chandrasekharan ; Moy, Dan ; Rassel, Robert Mark ; Safran, John Matthew ; Stein, Kenneth Jay ; Robson, Norman Whitelaw ; Wang, Ping-Chuan ; Yan, Hongwen ; International Business Machines Corporation</creatorcontrib><description>A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.</description><language>eng</language><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8159040$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8159040$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Coolbaugh, Douglas D</creatorcontrib><creatorcontrib>Eshun, Ebenezer E</creatorcontrib><creatorcontrib>Gebreselasie, Ephrem G</creatorcontrib><creatorcontrib>He, Zhong-Xiang</creatorcontrib><creatorcontrib>Ho, Herbert Lei</creatorcontrib><creatorcontrib>Kim, Deok-kee</creatorcontrib><creatorcontrib>Kothandaraman, Chandrasekharan</creatorcontrib><creatorcontrib>Moy, Dan</creatorcontrib><creatorcontrib>Rassel, Robert Mark</creatorcontrib><creatorcontrib>Safran, John Matthew</creatorcontrib><creatorcontrib>Stein, Kenneth Jay</creatorcontrib><creatorcontrib>Robson, Norman Whitelaw</creatorcontrib><creatorcontrib>Wang, Ping-Chuan</creatorcontrib><creatorcontrib>Yan, Hongwen</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor</title><description>A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjTEKAjEQRdNYiHqHOYCLERW0XhQbOzsLCZvZbCAmy8zk_k7AA1j9z-d93tK8HiguQXCCELNgICexZGChOkglBJc9fFCm4hUYUvUxhzboa6yMWwUkdq02dFcICDmyFFqbxegS4-aXKwO367O_d5Vn9WXht-pa2PP-dLFHe_gD-QIulTxc</recordid><startdate>20120417</startdate><enddate>20120417</enddate><creator>Coolbaugh, Douglas D</creator><creator>Eshun, Ebenezer E</creator><creator>Gebreselasie, Ephrem G</creator><creator>He, Zhong-Xiang</creator><creator>Ho, Herbert Lei</creator><creator>Kim, Deok-kee</creator><creator>Kothandaraman, Chandrasekharan</creator><creator>Moy, Dan</creator><creator>Rassel, Robert Mark</creator><creator>Safran, John Matthew</creator><creator>Stein, Kenneth Jay</creator><creator>Robson, Norman Whitelaw</creator><creator>Wang, Ping-Chuan</creator><creator>Yan, Hongwen</creator><scope>EFH</scope></search><sort><creationdate>20120417</creationdate><title>Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor</title><author>Coolbaugh, Douglas D ; Eshun, Ebenezer E ; Gebreselasie, Ephrem G ; He, Zhong-Xiang ; Ho, Herbert Lei ; Kim, Deok-kee ; Kothandaraman, Chandrasekharan ; Moy, Dan ; Rassel, Robert Mark ; Safran, John Matthew ; Stein, Kenneth Jay ; Robson, Norman Whitelaw ; Wang, Ping-Chuan ; Yan, Hongwen</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_081590403</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Coolbaugh, Douglas D</creatorcontrib><creatorcontrib>Eshun, Ebenezer E</creatorcontrib><creatorcontrib>Gebreselasie, Ephrem G</creatorcontrib><creatorcontrib>He, Zhong-Xiang</creatorcontrib><creatorcontrib>Ho, Herbert Lei</creatorcontrib><creatorcontrib>Kim, Deok-kee</creatorcontrib><creatorcontrib>Kothandaraman, Chandrasekharan</creatorcontrib><creatorcontrib>Moy, Dan</creatorcontrib><creatorcontrib>Rassel, Robert Mark</creatorcontrib><creatorcontrib>Safran, John Matthew</creatorcontrib><creatorcontrib>Stein, Kenneth Jay</creatorcontrib><creatorcontrib>Robson, Norman Whitelaw</creatorcontrib><creatorcontrib>Wang, Ping-Chuan</creatorcontrib><creatorcontrib>Yan, Hongwen</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Coolbaugh, Douglas D</au><au>Eshun, Ebenezer E</au><au>Gebreselasie, Ephrem G</au><au>He, Zhong-Xiang</au><au>Ho, Herbert Lei</au><au>Kim, Deok-kee</au><au>Kothandaraman, Chandrasekharan</au><au>Moy, Dan</au><au>Rassel, Robert Mark</au><au>Safran, John Matthew</au><au>Stein, Kenneth Jay</au><au>Robson, Norman Whitelaw</au><au>Wang, Ping-Chuan</au><au>Yan, Hongwen</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor</title><date>2012-04-17</date><risdate>2012</risdate><abstract>A semiconductor structure and a method for fabricating the semiconductor structure provide a field effect device located and formed upon an active region of a semiconductor substrate and at least one of a fuse structure, an anti-fuse structure and a resistor structure located and formed at least in part simultaneously upon an isolation region laterally separated from the active region within the semiconductor substrate. The field effect device includes a gate dielectric comprising a high dielectric constant dielectric material and a gate electrode comprising a metal material. The at least one of the fuse structure, anti-fuse structure and resistor structure includes a pad dielectric comprising the same material as the gate dielectric, and optionally, also a fuse, anti-fuse or resistor that may comprise the same metal material as the gate electrode.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_08159040
source USPTO Issued Patents
title Metal gate integration structure and method including metal fuse, anti-fuse and/or resistor
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-02-04T11%3A54%3A11IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Coolbaugh,%20Douglas%20D&rft.aucorp=International%20Business%20Machines%20Corporation&rft.date=2012-04-17&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08159040%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true