System and method for verifying the receive path of an input/output component

A system and method for verifying the receive path of an input/output device such as a network interface circuit. The device's operation with various different input sources (e.g., networks) and output sources (e.g., hosts, host buses) is modeled in a verification layer that employs multiple qu...

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Bibliographische Detailangaben

Hauptverfasser:	Srinivasan, Arvind, Puri, Rahoul
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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