Electronic device having a memory element and method of operation therefor

An electronic device comprises a processing unit operably coupled to a buffer random access memory, in turn operably coupled to a non-volatile memory configured to emulate an electrically erasable programmable read only memory. The processing unit is arranged to transfer data between the buffer RAM and the non-volatile memory at a first clock frequency. A second RAM is operably coupled between the processing unit and the non-volatile memory and the processing unit sets a Tag bit in the second RAM to identify an address in the buffer RAM that is being written to or read from by the processing unit.