Method and system for regulating current discharge during battery discharge conditioning cycle

Methods and systems are disclosed for utilizing a memory control circuit for controlling transfer of data to and from a memory system. A memory control circuit with a back up battery and control circuits is provided. Battery health is determined through a discharge cycle of the back up battery. A po...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Wang, Ligong, Chiasson, Shane
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Wang, Ligong
Chiasson, Shane
description Methods and systems are disclosed for utilizing a memory control circuit for controlling transfer of data to and from a memory system. A memory control circuit with a back up battery and control circuits is provided. Battery health is determined through a discharge cycle of the back up battery. A power supply generated from the back up battery is provided to circuitry of the memory control card during normal operations of the memory control circuit during a non-power loss state. The power supplied from the back up battery during the non-power loss state of the memory control circuit is utilized by at least a first circuit of the memory control circuit as part of normal memory controller card operations during the battery health discharge cycle. When the system is not performing a battery health cycle the first circuit receives normal system power. The memory control circuit may be a RAID card. The first circuit may be memory circuitry. The backup battery discharge rate may be regulated during the battery health discharge cycle by switching the power source for the circuitry of the memory control card between the backup battery and the normal system power.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08129946</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08129946</sourcerecordid><originalsourceid>FETCH-uspatents_grants_081299463</originalsourceid><addsrcrecordid>eNqNjDsOAjEMBdNQIOAOvsBK_ITYGi2ioaMGmcSbjRQSZDtFbg-LKCipppg3b2quZ9IhO8DkQKooPaDPDEy-RNSQPNjCTEnBBbEDsidwhUdxR1Xi-iNsTi5oyOnTVRtpbiY9RqHFlzMDx-5yODVFnqjvW7l5xhHL_Wrdttvd5o_JC0QWPkM</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method and system for regulating current discharge during battery discharge conditioning cycle</title><source>USPTO Issued Patents</source><creator>Wang, Ligong ; Chiasson, Shane</creator><creatorcontrib>Wang, Ligong ; Chiasson, Shane ; Dell Products L.P</creatorcontrib><description>Methods and systems are disclosed for utilizing a memory control circuit for controlling transfer of data to and from a memory system. A memory control circuit with a back up battery and control circuits is provided. Battery health is determined through a discharge cycle of the back up battery. A power supply generated from the back up battery is provided to circuitry of the memory control card during normal operations of the memory control circuit during a non-power loss state. The power supplied from the back up battery during the non-power loss state of the memory control circuit is utilized by at least a first circuit of the memory control circuit as part of normal memory controller card operations during the battery health discharge cycle. When the system is not performing a battery health cycle the first circuit receives normal system power. The memory control circuit may be a RAID card. The first circuit may be memory circuitry. The backup battery discharge rate may be regulated during the battery health discharge cycle by switching the power source for the circuitry of the memory control card between the backup battery and the normal system power.</description><language>eng</language><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8129946$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8129946$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Wang, Ligong</creatorcontrib><creatorcontrib>Chiasson, Shane</creatorcontrib><creatorcontrib>Dell Products L.P</creatorcontrib><title>Method and system for regulating current discharge during battery discharge conditioning cycle</title><description>Methods and systems are disclosed for utilizing a memory control circuit for controlling transfer of data to and from a memory system. A memory control circuit with a back up battery and control circuits is provided. Battery health is determined through a discharge cycle of the back up battery. A power supply generated from the back up battery is provided to circuitry of the memory control card during normal operations of the memory control circuit during a non-power loss state. The power supplied from the back up battery during the non-power loss state of the memory control circuit is utilized by at least a first circuit of the memory control circuit as part of normal memory controller card operations during the battery health discharge cycle. When the system is not performing a battery health cycle the first circuit receives normal system power. The memory control circuit may be a RAID card. The first circuit may be memory circuitry. The backup battery discharge rate may be regulated during the battery health discharge cycle by switching the power source for the circuitry of the memory control card between the backup battery and the normal system power.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNqNjDsOAjEMBdNQIOAOvsBK_ITYGi2ioaMGmcSbjRQSZDtFbg-LKCipppg3b2quZ9IhO8DkQKooPaDPDEy-RNSQPNjCTEnBBbEDsidwhUdxR1Xi-iNsTi5oyOnTVRtpbiY9RqHFlzMDx-5yODVFnqjvW7l5xhHL_Wrdttvd5o_JC0QWPkM</recordid><startdate>20120306</startdate><enddate>20120306</enddate><creator>Wang, Ligong</creator><creator>Chiasson, Shane</creator><scope>EFH</scope></search><sort><creationdate>20120306</creationdate><title>Method and system for regulating current discharge during battery discharge conditioning cycle</title><author>Wang, Ligong ; Chiasson, Shane</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_081299463</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Wang, Ligong</creatorcontrib><creatorcontrib>Chiasson, Shane</creatorcontrib><creatorcontrib>Dell Products L.P</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Wang, Ligong</au><au>Chiasson, Shane</au><aucorp>Dell Products L.P</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method and system for regulating current discharge during battery discharge conditioning cycle</title><date>2012-03-06</date><risdate>2012</risdate><abstract>Methods and systems are disclosed for utilizing a memory control circuit for controlling transfer of data to and from a memory system. A memory control circuit with a back up battery and control circuits is provided. Battery health is determined through a discharge cycle of the back up battery. A power supply generated from the back up battery is provided to circuitry of the memory control card during normal operations of the memory control circuit during a non-power loss state. The power supplied from the back up battery during the non-power loss state of the memory control circuit is utilized by at least a first circuit of the memory control circuit as part of normal memory controller card operations during the battery health discharge cycle. When the system is not performing a battery health cycle the first circuit receives normal system power. The memory control circuit may be a RAID card. The first circuit may be memory circuitry. The backup battery discharge rate may be regulated during the battery health discharge cycle by switching the power source for the circuitry of the memory control card between the backup battery and the normal system power.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_08129946
source USPTO Issued Patents
title Method and system for regulating current discharge during battery discharge conditioning cycle
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-24T02%3A48%3A27IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Wang,%20Ligong&rft.aucorp=Dell%20Products%20L.P&rft.date=2012-03-06&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08129946%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true