Reduction of silicide formation temperature on SiGe containing substrates

A method that solves the increased nucleation temperature that is exhibited during the formation of cobalt disilicides in the presence of Ge atoms is provided. The reduction in silicide formation temperature is achieved by first providing a structure including a Co layer including at least Ni, as an...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: Cabral, Jr, Cyril, Carruthers, Roy A, Chen, Jia, Detavernier, Christopher, Harper, James M, Lavoie, Christian
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Cabral, Jr, Cyril
Carruthers, Roy A
Chen, Jia
Detavernier, Christopher
Harper, James M
Lavoie, Christian
description A method that solves the increased nucleation temperature that is exhibited during the formation of cobalt disilicides in the presence of Ge atoms is provided. The reduction in silicide formation temperature is achieved by first providing a structure including a Co layer including at least Ni, as an additive element, on top of a SiGe containing substrate. Next, the structure is subjected to a self-aligned silicide process which includes a first anneal, a selective etching step and a second anneal to form a solid solution of (Co, Ni) disilicide on the SiGe containing substrate. The Co layer including at least Ni can comprise an alloy layer of Co and Ni, a stack of Ni/Co or a stack of Co/Ni. A semiconductor structure including the solid solution of (Co, Ni) disilicide on the SiGe containing substrate is also provided.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08125082</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08125082</sourcerecordid><originalsourceid>FETCH-uspatents_grants_081250823</originalsourceid><addsrcrecordid>eNrjZPAMSk0pTS7JzM9TyE9TKM7MyUzOTElVSMsvyk0Ei5ak5hakFiWWlBalKgC5wZnuqQrJ-XkliZl5mXnpCsWlScUlQOnUYh4G1rTEnOJUXijNzaDg5hri7KFbWlwAlM8rKY5PL0oEUQYWhkamBhZGxkQoAQDgijYW</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Reduction of silicide formation temperature on SiGe containing substrates</title><source>USPTO Issued Patents</source><creator>Cabral, Jr, Cyril ; Carruthers, Roy A ; Chen, Jia ; Detavernier, Christopher ; Harper, James M ; Lavoie, Christian</creator><creatorcontrib>Cabral, Jr, Cyril ; Carruthers, Roy A ; Chen, Jia ; Detavernier, Christopher ; Harper, James M ; Lavoie, Christian ; International Business Machines Corporation</creatorcontrib><description>A method that solves the increased nucleation temperature that is exhibited during the formation of cobalt disilicides in the presence of Ge atoms is provided. The reduction in silicide formation temperature is achieved by first providing a structure including a Co layer including at least Ni, as an additive element, on top of a SiGe containing substrate. Next, the structure is subjected to a self-aligned silicide process which includes a first anneal, a selective etching step and a second anneal to form a solid solution of (Co, Ni) disilicide on the SiGe containing substrate. The Co layer including at least Ni can comprise an alloy layer of Co and Ni, a stack of Ni/Co or a stack of Co/Ni. A semiconductor structure including the solid solution of (Co, Ni) disilicide on the SiGe containing substrate is also provided.</description><language>eng</language><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8125082$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8125082$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Cabral, Jr, Cyril</creatorcontrib><creatorcontrib>Carruthers, Roy A</creatorcontrib><creatorcontrib>Chen, Jia</creatorcontrib><creatorcontrib>Detavernier, Christopher</creatorcontrib><creatorcontrib>Harper, James M</creatorcontrib><creatorcontrib>Lavoie, Christian</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><title>Reduction of silicide formation temperature on SiGe containing substrates</title><description>A method that solves the increased nucleation temperature that is exhibited during the formation of cobalt disilicides in the presence of Ge atoms is provided. The reduction in silicide formation temperature is achieved by first providing a structure including a Co layer including at least Ni, as an additive element, on top of a SiGe containing substrate. Next, the structure is subjected to a self-aligned silicide process which includes a first anneal, a selective etching step and a second anneal to form a solid solution of (Co, Ni) disilicide on the SiGe containing substrate. The Co layer including at least Ni can comprise an alloy layer of Co and Ni, a stack of Ni/Co or a stack of Co/Ni. A semiconductor structure including the solid solution of (Co, Ni) disilicide on the SiGe containing substrate is also provided.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZPAMSk0pTS7JzM9TyE9TKM7MyUzOTElVSMsvyk0Ei5ak5hakFiWWlBalKgC5wZnuqQrJ-XkliZl5mXnpCsWlScUlQOnUYh4G1rTEnOJUXijNzaDg5hri7KFbWlwAlM8rKY5PL0oEUQYWhkamBhZGxkQoAQDgijYW</recordid><startdate>20120228</startdate><enddate>20120228</enddate><creator>Cabral, Jr, Cyril</creator><creator>Carruthers, Roy A</creator><creator>Chen, Jia</creator><creator>Detavernier, Christopher</creator><creator>Harper, James M</creator><creator>Lavoie, Christian</creator><scope>EFH</scope></search><sort><creationdate>20120228</creationdate><title>Reduction of silicide formation temperature on SiGe containing substrates</title><author>Cabral, Jr, Cyril ; Carruthers, Roy A ; Chen, Jia ; Detavernier, Christopher ; Harper, James M ; Lavoie, Christian</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_081250823</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Cabral, Jr, Cyril</creatorcontrib><creatorcontrib>Carruthers, Roy A</creatorcontrib><creatorcontrib>Chen, Jia</creatorcontrib><creatorcontrib>Detavernier, Christopher</creatorcontrib><creatorcontrib>Harper, James M</creatorcontrib><creatorcontrib>Lavoie, Christian</creatorcontrib><creatorcontrib>International Business Machines Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Cabral, Jr, Cyril</au><au>Carruthers, Roy A</au><au>Chen, Jia</au><au>Detavernier, Christopher</au><au>Harper, James M</au><au>Lavoie, Christian</au><aucorp>International Business Machines Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Reduction of silicide formation temperature on SiGe containing substrates</title><date>2012-02-28</date><risdate>2012</risdate><abstract>A method that solves the increased nucleation temperature that is exhibited during the formation of cobalt disilicides in the presence of Ge atoms is provided. The reduction in silicide formation temperature is achieved by first providing a structure including a Co layer including at least Ni, as an additive element, on top of a SiGe containing substrate. Next, the structure is subjected to a self-aligned silicide process which includes a first anneal, a selective etching step and a second anneal to form a solid solution of (Co, Ni) disilicide on the SiGe containing substrate. The Co layer including at least Ni can comprise an alloy layer of Co and Ni, a stack of Ni/Co or a stack of Co/Ni. A semiconductor structure including the solid solution of (Co, Ni) disilicide on the SiGe containing substrate is also provided.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_08125082
source USPTO Issued Patents
title Reduction of silicide formation temperature on SiGe containing substrates
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2024-12-25T00%3A03%3A30IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Cabral,%20Jr,%20Cyril&rft.aucorp=International%20Business%20Machines%20Corporation&rft.date=2012-02-28&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08125082%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true