Integrated circuit and method

An integrated circuit and method of fabricating an integrated circuit. One embodiment includes a circuit chip, a contact pad, and a projecting top contact. A signal line couples the contact pad to the projecting top contact, the contact pad, the projecting top contact. The signal line is arranged on...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: Yoon, Kimyung
Format: Patent
Sprache:eng
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
container_end_page
container_issue
container_start_page
container_title
container_volume
creator Yoon, Kimyung
description An integrated circuit and method of fabricating an integrated circuit. One embodiment includes a circuit chip, a contact pad, and a projecting top contact. A signal line couples the contact pad to the projecting top contact, the contact pad, the projecting top contact. The signal line is arranged on a top face of the circuit chip. A substrate and a lower contact pad, the lower contact pad is arranged on a bottom face of the substrate and the circuit chip is arranged on a top face of the substrate. A bottom face of the circuit chip is facing the top face of the substrate. A connection couples the contact pad on the circuit chip to the lower contact pad.
format Patent
fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08120186</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08120186</sourcerecordid><originalsourceid>FETCH-uspatents_grants_081201863</originalsourceid><addsrcrecordid>eNrjZJD1zCtJTS9KLElNUUjOLEouzSxRSMxLUchNLcnIT-FhYE1LzClO5YXS3AwKbq4hzh66pcUFQC15JcXxQL0gysDC0MjA0MLMmAglAK3BJPQ</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Integrated circuit and method</title><source>USPTO Issued Patents</source><creator>Yoon, Kimyung</creator><creatorcontrib>Yoon, Kimyung ; Qimonda AG</creatorcontrib><description>An integrated circuit and method of fabricating an integrated circuit. One embodiment includes a circuit chip, a contact pad, and a projecting top contact. A signal line couples the contact pad to the projecting top contact, the contact pad, the projecting top contact. The signal line is arranged on a top face of the circuit chip. A substrate and a lower contact pad, the lower contact pad is arranged on a bottom face of the substrate and the circuit chip is arranged on a top face of the substrate. A bottom face of the circuit chip is facing the top face of the substrate. A connection couples the contact pad on the circuit chip to the lower contact pad.</description><language>eng</language><creationdate>2012</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8120186$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8120186$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Yoon, Kimyung</creatorcontrib><creatorcontrib>Qimonda AG</creatorcontrib><title>Integrated circuit and method</title><description>An integrated circuit and method of fabricating an integrated circuit. One embodiment includes a circuit chip, a contact pad, and a projecting top contact. A signal line couples the contact pad to the projecting top contact, the contact pad, the projecting top contact. The signal line is arranged on a top face of the circuit chip. A substrate and a lower contact pad, the lower contact pad is arranged on a bottom face of the substrate and the circuit chip is arranged on a top face of the substrate. A bottom face of the circuit chip is facing the top face of the substrate. A connection couples the contact pad on the circuit chip to the lower contact pad.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2012</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZJD1zCtJTS9KLElNUUjOLEouzSxRSMxLUchNLcnIT-FhYE1LzClO5YXS3AwKbq4hzh66pcUFQC15JcXxQL0gysDC0MjA0MLMmAglAK3BJPQ</recordid><startdate>20120221</startdate><enddate>20120221</enddate><creator>Yoon, Kimyung</creator><scope>EFH</scope></search><sort><creationdate>20120221</creationdate><title>Integrated circuit and method</title><author>Yoon, Kimyung</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_081201863</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2012</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Yoon, Kimyung</creatorcontrib><creatorcontrib>Qimonda AG</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Yoon, Kimyung</au><aucorp>Qimonda AG</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Integrated circuit and method</title><date>2012-02-21</date><risdate>2012</risdate><abstract>An integrated circuit and method of fabricating an integrated circuit. One embodiment includes a circuit chip, a contact pad, and a projecting top contact. A signal line couples the contact pad to the projecting top contact, the contact pad, the projecting top contact. The signal line is arranged on a top face of the circuit chip. A substrate and a lower contact pad, the lower contact pad is arranged on a bottom face of the substrate and the circuit chip is arranged on a top face of the substrate. A bottom face of the circuit chip is facing the top face of the substrate. A connection couples the contact pad on the circuit chip to the lower contact pad.</abstract><oa>free_for_read</oa></addata></record>
fulltext fulltext_linktorsrc
identifier
ispartof
issn
language eng
recordid cdi_uspatents_grants_08120186
source USPTO Issued Patents
title Integrated circuit and method
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-28T18%3A25%3A40IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Yoon,%20Kimyung&rft.aucorp=Qimonda%20AG&rft.date=2012-02-21&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08120186%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true