Power state transition initiation control of memory interconnect based on early warning signal, memory response time, and wakeup delay
A proposal for power management control of an interconnect structure based on power state transition control. The power state transition is based on generating early warning signals and an idle timeout value setting based on response time and detection of subsequent requests.
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creator | Hallnor, Erik G Fang, Zhen Rotithor, Hemant G |
description | A proposal for power management control of an interconnect structure based on power state transition control. The power state transition is based on generating early warning signals and an idle timeout value setting based on response time and detection of subsequent requests. |
format | Patent |
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title | Power state transition initiation control of memory interconnect based on early warning signal, memory response time, and wakeup delay |
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