Fuse element reading circuit
A fuse element reading circuit including a first fuse element having a resistance which differs in accordance with whether the first fuse element is in a blown state or an unblown state, a reference voltage output circuit unit that outputs a reference voltage that differs in accordance with a normal...
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| creator | Takase, Rikio Sueda, Masahiro |
| description | A fuse element reading circuit including a first fuse element having a resistance which differs in accordance with whether the first fuse element is in a blown state or an unblown state, a reference voltage output circuit unit that outputs a reference voltage that differs in accordance with a normal mode or a test mode, and a voltage comparison circuit unit that compares a read voltage corresponding to the resistance of the first fuse element with the reference voltage output from the reference voltage output circuit unit. |
| format | Patent |
| fullrecord | <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08072831</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08072831</sourcerecordid><originalsourceid>FETCH-uspatents_grants_080728313</originalsourceid><addsrcrecordid>eNrjZJBxKy1OVUjNSc1NzStRKEpNTMnMS1dIzixKLs0s4WFgTUvMKU7lhdLcDApuriHOHrqlxQWJJUANxfHpRYkgysDCwNzIwtjQmAglAH0kJJU</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Fuse element reading circuit</title><source>USPTO Issued Patents</source><creator>Takase, Rikio ; Sueda, Masahiro</creator><creatorcontrib>Takase, Rikio ; Sueda, Masahiro ; Fujitsu Semiconductor Limited</creatorcontrib><description>A fuse element reading circuit including a first fuse element having a resistance which differs in accordance with whether the first fuse element is in a blown state or an unblown state, a reference voltage output circuit unit that outputs a reference voltage that differs in accordance with a normal mode or a test mode, and a voltage comparison circuit unit that compares a read voltage corresponding to the resistance of the first fuse element with the reference voltage output from the reference voltage output circuit unit.</description><language>eng</language><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8072831$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,776,798,881,64012</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8072831$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Takase, Rikio</creatorcontrib><creatorcontrib>Sueda, Masahiro</creatorcontrib><creatorcontrib>Fujitsu Semiconductor Limited</creatorcontrib><title>Fuse element reading circuit</title><description>A fuse element reading circuit including a first fuse element having a resistance which differs in accordance with whether the first fuse element is in a blown state or an unblown state, a reference voltage output circuit unit that outputs a reference voltage that differs in accordance with a normal mode or a test mode, and a voltage comparison circuit unit that compares a read voltage corresponding to the resistance of the first fuse element with the reference voltage output from the reference voltage output circuit unit.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZJBxKy1OVUjNSc1NzStRKEpNTMnMS1dIzixKLs0s4WFgTUvMKU7lhdLcDApuriHOHrqlxQWJJUANxfHpRYkgysDCwNzIwtjQmAglAH0kJJU</recordid><startdate>20111206</startdate><enddate>20111206</enddate><creator>Takase, Rikio</creator><creator>Sueda, Masahiro</creator><scope>EFH</scope></search><sort><creationdate>20111206</creationdate><title>Fuse element reading circuit</title><author>Takase, Rikio ; Sueda, Masahiro</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_080728313</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Takase, Rikio</creatorcontrib><creatorcontrib>Sueda, Masahiro</creatorcontrib><creatorcontrib>Fujitsu Semiconductor Limited</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Takase, Rikio</au><au>Sueda, Masahiro</au><aucorp>Fujitsu Semiconductor Limited</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Fuse element reading circuit</title><date>2011-12-06</date><risdate>2011</risdate><abstract>A fuse element reading circuit including a first fuse element having a resistance which differs in accordance with whether the first fuse element is in a blown state or an unblown state, a reference voltage output circuit unit that outputs a reference voltage that differs in accordance with a normal mode or a test mode, and a voltage comparison circuit unit that compares a read voltage corresponding to the resistance of the first fuse element with the reference voltage output from the reference voltage output circuit unit.</abstract><oa>free_for_read</oa></addata></record> |
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| language | eng |
| recordid | cdi_uspatents_grants_08072831 |
| source | USPTO Issued Patents |
| title | Fuse element reading circuit |
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