Semiconductor memory, system, operating method of semiconductor memory, and manufacturing method of semiconductor memory

A plurality of memory blocks includes real memory cells and redundancy memory cells, are accessed independently during a normal operation mode, and are accessed simultaneously during a test mode in order for common data to be written to the plurality of memory blocks. A block control unit selects th...

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Bibliographische Detailangaben

1. Verfasser:	Yagishita, Yoshimasa
Format:	Patent
Sprache:	eng
Online-Zugang:	Volltext bestellen
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