Method of manufacturing a trench transistor having a heavy body region

A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each...

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Hauptverfasser: Mo, Brian S, Chau, Duc, Sapp, Steven, Bencuya, Izak, Probst, Dean E
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Sprache:eng
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creator Mo, Brian S
Chau, Duc
Sapp, Steven
Bencuya, Izak
Probst, Dean E
description A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.
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fullrecord <record><control><sourceid>uspatents_EFH</sourceid><recordid>TN_cdi_uspatents_grants_08044463</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>08044463</sourcerecordid><originalsourceid>FETCH-uspatents_grants_080444633</originalsourceid><addsrcrecordid>eNrjZHDzTS3JyE9RyE9TyE3MK01LTC4pLcrMS1dIVCgpSs1LzgBSiXnFmcUl-UUKGYllEKmM1MSySoWk_JRKhaLU9Mz8PB4G1rTEnOJUXijNzaDg5hri7KFbWlyQWJKaV1Icnw40B0gZWBiYmJiYGRsToQQA73E0ag</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>Method of manufacturing a trench transistor having a heavy body region</title><source>USPTO Issued Patents</source><creator>Mo, Brian S ; Chau, Duc ; Sapp, Steven ; Bencuya, Izak ; Probst, Dean E</creator><creatorcontrib>Mo, Brian S ; Chau, Duc ; Sapp, Steven ; Bencuya, Izak ; Probst, Dean E ; Fairchild Semiconductor Corporation</creatorcontrib><description>A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.</description><language>eng</language><creationdate>2011</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktopdf>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8044463$$EPDF$$P50$$Guspatents$$Hfree_for_read</linktopdf><link.rule.ids>230,308,780,802,885,64039</link.rule.ids><linktorsrc>$$Uhttps://image-ppubs.uspto.gov/dirsearch-public/print/downloadPdf/8044463$$EView_record_in_USPTO$$FView_record_in_$$GUSPTO$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>Mo, Brian S</creatorcontrib><creatorcontrib>Chau, Duc</creatorcontrib><creatorcontrib>Sapp, Steven</creatorcontrib><creatorcontrib>Bencuya, Izak</creatorcontrib><creatorcontrib>Probst, Dean E</creatorcontrib><creatorcontrib>Fairchild Semiconductor Corporation</creatorcontrib><title>Method of manufacturing a trench transistor having a heavy body region</title><description>A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.</description><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2011</creationdate><recordtype>patent</recordtype><sourceid>EFH</sourceid><recordid>eNrjZHDzTS3JyE9RyE9TyE3MK01LTC4pLcrMS1dIVCgpSs1LzgBSiXnFmcUl-UUKGYllEKmM1MSySoWk_JRKhaLU9Mz8PB4G1rTEnOJUXijNzaDg5hri7KFbWlyQWJKaV1Icnw40B0gZWBiYmJiYGRsToQQA73E0ag</recordid><startdate>20111025</startdate><enddate>20111025</enddate><creator>Mo, Brian S</creator><creator>Chau, Duc</creator><creator>Sapp, Steven</creator><creator>Bencuya, Izak</creator><creator>Probst, Dean E</creator><scope>EFH</scope></search><sort><creationdate>20111025</creationdate><title>Method of manufacturing a trench transistor having a heavy body region</title><author>Mo, Brian S ; Chau, Duc ; Sapp, Steven ; Bencuya, Izak ; Probst, Dean E</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-uspatents_grants_080444633</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2011</creationdate><toplevel>online_resources</toplevel><creatorcontrib>Mo, Brian S</creatorcontrib><creatorcontrib>Chau, Duc</creatorcontrib><creatorcontrib>Sapp, Steven</creatorcontrib><creatorcontrib>Bencuya, Izak</creatorcontrib><creatorcontrib>Probst, Dean E</creatorcontrib><creatorcontrib>Fairchild Semiconductor Corporation</creatorcontrib><collection>USPTO Issued Patents</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>Mo, Brian S</au><au>Chau, Duc</au><au>Sapp, Steven</au><au>Bencuya, Izak</au><au>Probst, Dean E</au><aucorp>Fairchild Semiconductor Corporation</aucorp><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Method of manufacturing a trench transistor having a heavy body region</title><date>2011-10-25</date><risdate>2011</risdate><abstract>A trenched field effect transistor is provided that includes (a) a semiconductor substrate, (b) a trench extending a predetermined depth into the semiconductor substrate, (c) a pair of doped source junctions, positioned on opposite sides of the trench, (d) a doped heavy body positioned adjacent each source junction on the opposite side of the source junction from the trench, the deepest portion of the heavy body extending less deeply into said semiconductor substrate than the predetermined depth of the trench, and (e) a doped well surrounding the heavy body beneath the heavy body.</abstract><oa>free_for_read</oa></addata></record>
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title Method of manufacturing a trench transistor having a heavy body region
url https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-04T01%3A44%3A22IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-uspatents_EFH&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=Mo,%20Brian%20S&rft.aucorp=Fairchild%20Semiconductor%20Corporation&rft.date=2011-10-25&rft_id=info:doi/&rft_dat=%3Cuspatents_EFH%3E08044463%3C/uspatents_EFH%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true